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In recent years, graph-processing has become an essential class of workloads with applications in a rapidly growing number of fields. Graph-processing typically uses large input sets, often in multi-gigabyte scale, and data-dependent graph…

Hardware Architecture · Computer Science 2025-10-24 Alexandre Valentin Jamet , Lluc Alvarez , Marc Casas

Retrieving data from large-scale source code archives is vital for AI training, neural-based software analysis, and information retrieval, to cite a few. This paper studies and experiments with the design of a compressed key-value store for…

Data Structures and Algorithms · Computer Science 2026-01-21 Paolo Ferragina , Francesco Tosoni

The biggest cost of computing with large matrices in any modern computer is related to memory latency and bandwidth. The average latency of modern RAM reads is 150 times greater than a clock step of the processor. Throughput is a little…

Data Structures and Algorithms · Computer Science 2013-03-04 Crysttian Arantes Paixão , Flávio Codeço Coelho

We study general techniques for implementing distributed data structures on top of future many-core architectures with non cache-coherent or partially cache-coherent memory. With the goal of contributing towards what might become, in the…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-09 Panagiota Fatourou , Nikolaos D. Kallimanis , Eleni Kanellou , Odysseas Makridakis , Christi Symeonidou

Modern X-ray detector systems urgently require compact, efficient, and fast data compression schemes to handle the transmission of big data from pixel arrays, enabling frame rates in the MHz regime. In this work, a data compression ASIC…

In this study, we address the challenge of low-rank model compression in the context of in-memory computing (IMC) architectures. Traditional pruning approaches, while effective in model size reduction, necessitate additional peripheral…

Hardware Architecture · Computer Science 2025-02-13 Kang Eun Jeon , Johnny Rhe , Jong Hwan Ko

Due to increasing cache sizes and large leakage consumption of SRAM device, conventional SRAM caches contribute significantly to the processor power consumption. Recently researchers have used non-volatile memory devices to design caches,…

Hardware Architecture · Computer Science 2014-05-01 Sparsh Mittal

Coded caching systems have been widely studied to reduce the data transmission during the peak traffic time. In practice, two important parameters of a coded caching system should be considered, i.e., the rate which is the maximum amount of…

Information Theory · Computer Science 2018-10-18 Minquan Cheng , Jie Li , Xiaohu Tang , Ruizhong Wei

3D integration technologies are seeing widespread adoption in the semiconductor industry to offset the limitations and slowdown of two-dimensional scaling. High-density 3D integration techniques such as face-to-face wafer bonding with…

Transformers have led to learning-based image compression methods that outperform traditional approaches. However, these methods often suffer from high complexity, limiting their practical application. To address this, various strategies…

Image and Video Processing · Electrical Eng. & Systems 2024-09-06 Bouzid Arezki , Anissa Mokraoui , Fangchen Feng

Lightweight Temporal Compression (LTC) is among the lossy stream compression methods that provide the highest compression rate for the lowest CPU and memory consumption. As such, it is well suited to compress data streams in…

Information Theory · Computer Science 2018-11-27 Bo Li , Omid Sarbishei , Hosein Nourani , Tristan Glatard

The autoregressive decoding in LLMs is the major inference bottleneck due to the memory-intensive operations and limited hardware bandwidth. 3D-stacked architecture is a promising solution with significantly improved memory bandwidth, which…

Hardware Architecture · Computer Science 2025-11-20 Siyuan He , Peiran Yan , Yandong He , Youwei Zhuo , Tianyu Jia

The consistent demand for better performance has lead to innovations at hardware and microarchitectural levels. 3D stacking of memory and logic dies delivers an order of magnitude improvement in available memory bandwidth. The price paid…

Hardware Architecture · Computer Science 2018-09-11 Karthik Rao , William Song , Yorai Wardi , Sudhakar Yalamanchili

Massive off-chip accesses in GPUs are the main performance bottleneck, and we divided these accesses into three types: (1) Write, (2) Data-Read, and (3) Read-Only. Besides, We find that many writes are duplicate, and the duplication can be…

Hardware Architecture · Computer Science 2024-08-20 Wei Zhao , Dan Feng , Wei Tong , Xueliang Wei , Bing Wu

Memory-bound algorithms show complex performance and energy consumption behavior on multicore processors. We choose the lattice-Boltzmann method (LBM) on an Intel Sandy Bridge cluster as a prototype scenario to investigate if and how…

Performance · Computer Science 2015-05-25 Markus Wittmann , Georg Hager , Thomas Zeiser , Jan Treibig , Gerhard Wellein

The configurable building blocks of current FPGAs -- Logic blocks (LBs), Digital Signal Processing (DSP) slices, and Block RAMs (BRAMs) -- make them efficient hardware accelerators for the rapid-changing world of Deep Learning (DL).…

Hardware Architecture · Computer Science 2021-10-01 Aman Arora , Bagus Hanindhito , Lizy K. John

Processing-in-cache (PiC) and Processing-in-memory (PiM) architectures, especially those utilizing bit-line computing, offer promising solutions to mitigate data movement bottlenecks within the memory hierarchy. While previous studies have…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Tosiron Adegbija , Kevin Gomez

Virtual Data Center (VDC) embedding has drawn significant attention recently because of growing need for efficient and flexible means of Data Center (DC) resource allocation. Existing studies on VDC embedding mainly focus on improving DCs'…

Networking and Internet Architecture · Computer Science 2019-12-30 Chao Guo , Kai Xu , Gangxiang Shen , Moshe Zukerman

One-sided dense matrix decompositions (e.g., Cholesky, LU, and QR) are the key components in scientific computing in many different fields. Although their design has been highly optimized for modern processors, they still consume a…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-27 Jieyang Chen , Xin Liang , Kai Zhao , Hadi Zamani Sabzi , Laxmi Bhuyan , Zizhong Chen

Secure Multi-party Computation (MPC) enables untrusted parties to jointly compute a function without revealing their inputs. Its application to machine learning (ML) has gained significant attention, particularly for secure inference…

Cryptography and Security · Computer Science 2026-02-17 Tingting Tang , Yongqin Wang , Murali Annavaram