Related papers: An FPGA-based Timing and Control System for the Dy…

Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit (SQC) technology, synchronization…

This paper presents the design and implementation of a high-density, deterministic trigger distribution system tailored for the C-band photocathode electron gun test platform at the Southern Advanced Photon Source (SAPS). Implemented within…

Digital correlators play a significant role in dynamic light scattering (DLS) technology, which characterizes particle size distribution. We present a field programmable gate array (FPGA)-based digital correlator that can be applied to…

This paper presents an in-depth analysis of timing closure challenges and constraints in Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). We examine core timing principles, architectural…

This paper presents an architecture of high-resolution delay generator implemented in a single field programmable gate array (FPGA) chip by exploiting the method of utilizing dedicated carry chains. It serves as the core component in…

A 3.8ps root mean square (RMS) time synchronization implemented in a 20nm fabrication process ultrascale kintex Field Programmable Gate Array (FPGA) is presented. The multichannel high-speed serial transceivers (e.g. GTH) play a key role in…

Many application domains face the challenges of high-power consumption and high computational demands, especially with the advancement in embedded machine learning and edge computing. Designing application-specific circuits is crucial to…

Experiments in Atomic, Molecular, and Optical (AMO) physics require precise and accurate control of digital, analog, and radio frequency (RF) signals. We present a control hardware based on a field programmable gate array (FPGA) core which…

The timing system of the Swiss Light Source is based on the event system concept of APS, Argonne [1]. However, for SLS the hardware was completely redesigned while preserving the software compatibility with the APS system. This gave us a…

Timing optimization during global placement is critical for achieving optimal circuit performance and remains a key challenge in modern Field Programmable Gate Array (FPGA) design. As FPGA designs scale and heterogeneous resources increase,…

We report a non-blocking high-resolution digital delay line based on an asynchronous circuit design. Field programmable gate array logic primitives were used as a source of delay and optimally arranged using combinatorial optimization. This…

The operation of CMOS Field Programmable Gate Arrays (FPGAs) at extremely cold environments as low as 4 K is demonstrated. Various FPGA and periphery hardware design techniques spanning from HDL design to improvements of peripheral…

Development of modern integrated circuit technologies makes it feasible to develop cheaper, faster and smaller special purpose signal processing function circuits. Digital Signal processing functions are generally implemented either on…

We present a compact FPGA-based pulse sequencer and radio-frequency (RF) generator suitable for experiments with cold trapped ions and atoms. The unit is capable of outputting a pulse sequence with at least 32 TTL channels with a timing…

Time-to-Digital Converters (TDCs) are major components for the measurements of time intervals. Recent developments in Field-Programmable Gate Array (FPGA) have enabled the opportunity to implement high-performance TDCs, which were only…

This study presents a novel field-programmable gate array (FPGA)-based Time-to-Digital Converter (TDC) design suitable for high timing resolution applications, utilizing two new techniques. First, a cross-detection (CD) method is introduced…

We have designed, implemented and tested a time-to-digital converter core in a low-cost Spartan-6 FPGA. Our design exploits the finite propagation speed in carry chains to realize a delay line in which the propagation distance of the…

Inspired by Wilkinson ADC method, we implement a fast linear discharge method based on FPGA to digitize nuclear pulse signal. In this scheme, we use a constant current source to discharge the charge on capacitor which is integrated by the…

Recently we have shown a system developed to precisely control the laser pulse timing of excimer lasers [1]. The electronic circuit based on an embedded microcontroller and utilized the natural jitter noise of the laser pulse generation to…

The upgrade of ATLAS Liquid Argon Calorimeter (LAr) Phase-1 trigger requires high-speed, low-latency data transmission to read out the Lar Trigger Digitizer Board (LTDB). A dual-channel transmitter ASIC LOCx2 have been designed and…