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This work inspects the parameters that affect the conversion rate of a ramp-counter ADC and propose two small systematical changes to reduce the time needed to complete a single analog to digital conversion by use of the locality principle…
In this work, we consider the acquisition of stationary signals using uniform analog-to-digital converters (ADCs), i.e., employing uniform sampling and scalar uniform quantization. We jointly optimize the pre-sampling and reconstruction…
We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for the CMS Endcap Timing Layer (ETL) of High-Luminosity…
Neuromorphic vision processor is an electronic implementation of vision algorithm processor on semiconductor. To image the world, a low-power CMOS image sensor array is required in the vision processor. The image sensor array is typically…
The design of a high-precision time-to-digital converter (TDC) based on a multiphase clock implemented using a single field-programmable gate array is discussed in this paper. The TDC can increase the resolution of the measurement by using…
This paper present high precision halfwave rectifier circuit in dual phase output mode by 0.5 micrometer CMOS technology, plus or minus 1.5 V low voltage, it has received input signal and sent output current signal, respond in high…
This letter presents an improved peak cancellation (PC) scheme for peak-to-average power ratio (PAPR) reduction in orthogonal frequency division multiplexing (OFDM) systems. The main idea is based on a serial peak cancellation (SPC) mode…
This paper proposes a Low-Power, Energy Efficient 4-bit Binary Coded Decimal (BCD) adder design where the conventional 4-bit BCD adder has been modified with the Clock Gated Power Gating Technique. Moreover, the concept of DVT (Dual-vth)…
In this paper, a highly compact, low power (<10W), high frequency (2 MHz) isolated active clamp forward converter, comprising a coreless Printed Circuit Board-based transformer is proposed. To decrease the size of converter, high switching…
Data centers require high-performance network equipment that consume low power and support high bandwidth requirements. In this context, a combinatorial approach was proposed to design data center network (DCN) equipment from a library of…
The goal of this work is to minimize the energy dissipation of embedded controllers without jeopardizing the quality of control (QoC). Taking advantage of the dynamic voltage scaling (DVS) technology, this paper develops a performance-aware…
A pico-ampere sensitive electrochemical sensor signal acquisition chain consisting of a multi-channel bidirectional current-mirror based potentiostat and a multiplexed current-input delta-sigma ($\Delta \Sigma$) ADC is presented.…
A four-stage operational transconductance amplifier (OTA) for ultra-low-power applications is introduced in this paper. The proposed circuit inclusive of frequency compensation requires minimal transistor count and passives, overcoming the…
Mass characterisation of emerging memory devices is an essential step in modelling their behaviour for integration within a standard design flow for existing integrated circuit designers. This work develops a novel characterisation platform…
The true-differential superconductor on-chip amplifier has complementary outputs that float with respect to chip ground. This improves signal integrity and compatibility with the receiving semiconductor stage. Both source-terminated and…
Battery-powered IoT devices face challenges like cost, maintenance, and environmental sustainability, prompting the emergence of batteryless energy-harvesting systems that harness ambient sources. However, their intermittent behavior can…
Time-domain ADCs are attractive for high-speed wireline receivers, as time resolution scales favorably with advanced CMOS technologies, enabling multi-GS/s single-channel sampling rates. However, conventional time-domain ADCs require…
This paper proposes a novel switching algorithm for modular multilevel converters (MMCs) that significantly reduces the switching frequency while fulfilling all control objectives required for their proper operation. Unlike in the…
An LCL filter offers superior attenuation for high-frequency harmonics for three-phase grid-following inverters compared to LC and L filters. However, it also introduces an inherent resonance peak, which can lead to power quality issues or…
Conventional analog and mixed-signal (AMS) circuit designs heavily rely on manual effort, which is time-consuming and labor-intensive. This paper presents a fully automated design methodology for Successive Approximation Register (SAR)…