Related papers: Spiderweb array: A sparse spin-qubit array
Spins in gate-defined silicon quantum dots are promising candidates for implementing large-scale quantum computing. To read the spin state of these qubits, the mechanism that has provided the highest fidelity is spin-to-charge conversion…
Noisy intermediate-scale quantum (NISQ) devices seek to achieve quantum advantage over classical systems without the use of full quantum error correction. We propose a NISQ processor architecture using a qubit `pipeline' in which all…
In this paper, we explore the relationship between the width of a qubit lattice constrained in one dimension and physical thresholds for scalable, fault-tolerant quantum computation. To circumvent the traditionally low thresholds of small…
This paper addresses the problem of finding the depth overhead that will be incurred when running quantum circuits on near-term quantum computers. Specifically, it is envisaged that near-term quantum computers will have low qubit…
Quantum bits (qubits) are prone to several types of errors due to uncontrolled interactions with their environment. Common strategies to correct these errors are based on architectures of qubits involving daunting hardware overheads. A…
We have developed a quantum annealing processor, based on an array of tunably coupled rf-SQUID flux qubits, fabricated in a superconducting integrated circuit process [1]. Implementing this type of processor at a scale of 512 qubits and…
The spin states of electrons confined in semiconductor quantum dots form a promising platform for quantum computation. Recent studies of silicon CMOS qubits have shown coherent manipulation of electron spin states with extremely high…
In this study, we address challenges in designing quantum information processors based on electron spin qubits in electrostatically-defined quantum dots (QDs). Numerical calculations of charge stability diagrams are presented for a…
To realize large-scale quantum information processes, an ideal scheme for two-qubit operations should enable diverse operations with given hardware and physical interaction. However, for spin qubits in semiconductor quantum dots, the common…
Circuit quantum electrodynamics allows spatially separated superconducting qubits to interact via a "quantum bus", enabling two-qubit entanglement and the implementation of simple quantum algorithms. We combine the circuit quantum…
Analysis and verification of quantum circuits are highly challenging, given the exponential dependence of the number of states on the number of qubits. For analytical derivation, we propose a new quantum polynomial representation (QPR) to…
Scalable architectures for quantum information technologies require to selectively couple long-distance qubits while suppressing environmental noise and cross-talk. In semiconductor materials, the coherent coupling of a single spin on a…
The path to fault-tolerant quantum computing hinges on hardware that scales while remaining compatible with quantum error correction (QEC). Silicon spin qubits are a leading hardware candidate because they combine industrial fabrication…
Compilation and optimization of quantum circuits are critical components in the execution of algorithms on quantum computers. These components must successfully balance two competing priorities: minimizing the number of expensive resources,…
Circuit cutting allows quantum circuits larger than the available hardware to be executed. Cutting techniques split circuits into smaller subcircuits, run them on the hardware, and recombine results through classical post-processing.…
In circuit-based quantum computing, the available gate set typically consists of single-qubit gates acting on each individual qubit and at least one entangling gate between pairs of qubits. In certain physical architectures, however, some…
Andreev (or superconducting) spin qubits (ASQs) have recently emerged as a promising qubit platform that combines superconducting circuits with semiconductor spin degrees of freedom. While recent experiments have successfully coupled two…
A foundational assumption of quantum error correction theory is that quantum gates can be scaled to large processors without exceeding the error-threshold for fault tolerance. Two major challenges that could become fundamental roadblocks…
The central challenge of quantum computing is implementing high-fidelity quantum gates at scale. However, many existing approaches to qubit control suffer from a scale-performance trade-off, impeding progress towards the creation of useful…
Scaling quantum computers, i.e., quantum processing units (QPUs) to enable the execution of large quantum circuits is a major challenge, especially for applications that should provide a quantum advantage over classical algorithms. One…