Related papers: In-pixel automatic threshold calibration for the C…

We present the characterization of a readout Application-Specific Integrated Circuit (ASIC) for the CMS Endcap Timing Layer (ETL) of the High-Luminosity LHC upgrade with charge injection. The ASIC, named ETROC and developed in a 65 nm CMOS…

We present the design and characterization of the first full chain precision timing prototype ASIC, named ETL Readout Chip version 1 (ETROC1) for the CMS MTD endcap timing layer (ETL) upgrade. The ETL utilizes Low Gain Avalanche Diode…

We present an FPGA-based readout chip emulator board for the CMS Endcap Timing Layer (ETL) detector upgrade. The emulator board uses an Intel Cyclone 10 GX FPGA to emulate the digital functions of four Endcap Layer Readout Chips (ETROCs).…

We present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version of a clock synthesis circuit named ljCDR from the Low-Power…

The analog front-end for the Low Gain Avalanche Detector (LGAD) based precision timing application in the CMS Endcap Timing Layer (ETL) has been prototyped in a 65 nm CMOS mini-ASIC named ETROC0. Serving as the very first prototype of ETL…

We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for the CMS Endcap Timing Layer (ETL) of High-Luminosity…

Readout chips of hybrid pixel detectors use a low power amplifier and threshold discrimination to process charge deposited in semiconductor sensors. Due to transistor mismatch each pixel circuit needs to be calibrated individually to…

The High Luminosity Large Hadron Collider (HL-LHC) at CERN is expected to collide protons at a center-of-mass energy of 14 TeV and to reach the unprecedented peak instantaneous luminosity of $7.5 \times 10^{34} \text{cm}^{-2} \text{s}^{-1}$…

The prototype of time digitizing system for the upgrade of BESIII endcap TOF (ETOF) is introduced in this paper. The ETOF readout electronics has a formation of distributed architecture that hit signal from multi-gap resistive plate chamber…

The electromagnetic ealorimeter (ECAL) of the CMS detector has played an important role in the physics program of the experiment, delivering outstanding performance throughout data taking. The High-Luminosity LHC will pose new challenges.…

During the High Luminosity phase of LHC, up to 200 proton-proton collisions per bunch crossing will bring severe challenges for event reconstruction. To mitigate pileup effects, an extended upgrade program of the CMS experiment is expected.…

The front-end electronics of silicon detectors are typically designed to ensure optimal noise performance for the expected input charge. A combination of preamplifiers and shaper circuits result in a nontrivial response of the front-end to…

We present a readout chip prototype for future pixel detectors with timing capabilities. The prototype is intended for characterizing 4D pixel arrays with a pixel size of $100\times100~\mu \text{m}^2$, where the sensors are Low Gain…

The current CMS silicon pixel detector as the innermost component of the CMS experiment is performing well at LHC design luminosity, but would be subject to severe inefficiencies at LHC peak luminosities of 2x10e34 cm^-2 s^-1. Therefore, an…

In the upcoming LHC Run 3, starting in 2021, the upgraded Time Projection Chamber (TPC) of the ALICE experiment will record minimum bias Pb-Pb collisions in a continuous readout mode at an interaction rate up to 50 kHz. This corresponds to…

This work presents the 8-channel FastIC+, a low-power consumption and highly configurable multi-channel front-end ASIC with internal digitization, for the readout of photo-sensors with picosecond time resolution and intrinsic gain. This…

The ITkPixV2 chip is the final production readout chip for the ATLAS Phase 2 Inner Tracker (ITk) upgrade at the upcoming High-Luminosity LHC (HL-LHC). Due to the extraordinarily high peak luminosity at the HL-LHC of $5 \times 10^{34}$…

Following the Phase-II upgrade during Long Shutdown (LS3), the LHC aims to reach a peak instantaneous luminosity of $7.5\times 10^{34}$cm$^{-2}$s$^{-1}$, which corresponds to an average of around 200 inelastic proton-proton collisions per…

A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…

The growing maturity of photonic integrated circuit (PIC) fabrication technology enables the high integration of an increasing number of optical components onto a single chip. With the incremental circuit complexity, the calibration of…