Related papers: Irredundant Buffer and Splitter Insertion and Sche…
The Landauer limit is to irreversible logic what the Carnot cycle is to heat engines. This limit is approached in the adiabatic Quantum Flux Parametron (aQFP) by copying the inputs of standard logic gates to produce reversible logic gates,…
This paper presents a proof-of-concept for integrating quantum hardware with real-time digital simulator (RTDS) to model and control modern power systems, including renewable energy resources. Power flow (PF) analysis and optimal power flow…
Adiabatic quantum programming defines the time-dependent mapping of a quantum algorithm into an underlying hardware or logical fabric. An essential step is embedding problem-specific information into the quantum logical fabric. We present…
On-chip inductor design plays a critical role in the advancement of radio-frequency integrated circuits (RFICs). Inductors typically occupy a substantial portion of the chip area as their performance metrics, namely, inductance density and…
As quantum hardware increases in complexity, successful algorithmic execution relies more heavily on awareness of existing device constraints. In this work we focus on the problem of routing quantum information across the machine to…
With the increasing penetration of Inverter-Based Resources (IBRs), power system stability constraints must be incorporated into the operational framework, transforming it into stability-constrained optimization. Currently, there exist…
Quantum computing promises breakthroughs in simulating and solving complex, classically intractable problems. However, current noisy intermediate-scale quantum (NISQ) devices are relatively small and error-prone, prohibiting large-scale…
While the capabilities of quantum hardware have significantly advanced in recent years, executing quantum algorithms as quantum circuits at the lowest possible cost remains crucial, regardless of the hardware progress. We are developing a…
There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivity, and coherence times, a quantum circuit optimization is essential to make the best use of near-term quantum devices. We…
This paper proposes an algorithm for synthesis of clock-follow-data designs that provides robustness against timing violations for RSFQ circuits while maintaining high performance and minimizing area costs. Since superconducting logic gates…
Cryogenic qubit controllers (QCs) are the key to build large-scale superconducting quantum processors. However, developing scalable QCs is challenging because the cooling power of a dilution refrigerator is too small (~10 $\mu$W at ~10 mK)…
A superconducting chip containing a regular array of flux qubits, tunable interqubit inductive couplers, an XY-addressable readout system, on-chip programmable magnetic memory, and a sparse network of analog control lines has been studied.…
A key distinguishing feature of single flux quantum (SFQ) circuits is that each logic gate is clocked. This feature forces the introduction of path-balancing flip-flops to ensure proper synchronization of inputs at each gate. This paper…
We have developed a quantum annealing processor, based on an array of tunably coupled rf-SQUID flux qubits, fabricated in a superconducting integrated circuit process [1]. Implementing this type of processor at a scale of 512 qubits and…
The single-chip crosspoint-queued (CQ) switch is a compact switching architecture that has all its buffers placed at the crosspoints of input and output lines. Scheduling is also performed inside the switching core, and does not rely on…
As the effort to scale up existing quantum hardware proceeds, it becomes necessary to schedule quantum gates in a way that minimizes the number of operations. There are three constraints that have to be satisfied: the order or dependency of…
In near-term quantum computing devices, connectivity between qubits remain limited by architectural constraints. A computational circuit with given connectivity requirements necessary for multi-qubit gates have to be embedded within…
In this study, we propose an efficient quantum multiplication approach based on a QFT-assisted parallelized addition scheme. The multiplication stage is implemented using a structure composed entirely of Toffoli gates, which generate…
A circuit consisting of a network of coupled compound Josephson junction rf-SQUID flux qubits has been used to implement an adiabatic quantum optimization algorithm. It is shown that detailed knowledge of the magnitude of the persistent…
A limited number of qubits, high error rates, and limited qubit connectivity are major challenges for effective near-term quantum computations. Quantum circuit partitioning divides a quantum computation into a set of computations that…