Maximum Q-factor of planar inductors

On-chip inductor design plays a critical role in the advancement of radio-frequency integrated circuits (RFICs). Inductors typically occupy a substantial portion of the chip area as their performance metrics, namely, inductance density and Quality factor ($Q$-factor), are fundamentally tied to the available footprint, thereby limiting miniaturization. To better understand and quantify these limitations, we employ rigorous electromagnetic analysis together with convex optimization techniques to derive a fundamental bound on the maximum achievable $Q$-factor of electrically-small planar inductors as a function of the available design area. The analysis yields analytical expressions for the bound and, via modal analysis techniques, identifies and interprets operational regimes and scaling trends with respect to design area and material conductivity. The analysis accounts for both ohmic and radiation losses, with the latter becoming significant as the inductor size increases. A broad set of state-of-the-art inductor designs from the literature is evaluated against the established $Q$-factor upper bound, identifying designs that approach the theoretical limit as well as those with potential for further improvement. The study is extended to include the effect of kinetic inductance, which offers a promising avenue toward next-generation inductors with higher inductance densities and $Q$-factors. By establishing this benchmark, this work aims to guide and inspire the design of more efficient and compact planar inductors for high-performance RF systems.