Related papers: Taming Process Variations in CNFET for Efficient L…

We have fabricated air-stable n-type, ambipolar carbon nanotube field effect transistors (CNFETs), and used them in nanoscale memory cells. N-type transistors are achieved by annealing of nanotubes in hydrogen gas and contacting them by…

Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique…

Gate-all-around Vertical Nanowire Field Effect Transistors (VNWFET) are emerging devices, which are well suited to pursue scaling beyond lateral scaling limitations around 7nm. This work explores the relative merits and drawbacks of the…

Complementary metal oxide semiconductor technology (CMOS) has been faced critical challenges in nano-scale regime. CNTFET (Carbon Nanotube Field effect transistor) technology is a promising alternative for CMOS technology. In this paper, we…

Carbon nanotube field-effect transistor (CNTFET) refers to a field-effect transistor that utilizes a single carbon nanotube or an array of carbon nanotubes as the channel material instead of bulk silicon in the traditional MOSFET structure.…

The increased memory demands of workloads is putting high pressure on Last Level Caches (LLCs). Unfortunately, there is limited opportunity to increase the capacity of LLCs due to the area and power requirements of the underlying SRAM…

Carbon Nanotube (CNT) appears as a promising candidate to shrink field-effect transistors (FET) to the nanometer scale. Extensive experimental works have been performed recently to develop the appropriate technology and to explore DC…

Speed is a major concern for high density VLSI networks. In this paper the closed form delay model for current mode signalling in VLSI interconnects has been proposed with resistive load termination. RLC interconnect line is modelled using…

With technology scaling, the size of cache systems in chip-multiprocessors (CMPs) has been dramatically increased to efficiently store and manipulate a large amount of data in future applications and decrease the gap between cores and…

Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high density, and fast read speed. The STT-RAM's small feature size is…

Carbon nanotube field-effect transistors (CNT FETs) are regarded as promising candidates for next-generation energy-efficient computing systems. While research has employed the lift-off process to demonstrate the performance of CNT FETs,…

Convolutional Neural Networks (CNNs) have proven to be extremely accurate for image recognition, even outperforming human recognition capability. When deployed on battery-powered mobile devices, efficient computer architectures are required…

Carbon Nanotube Field Effect Transistor (CNFET) is a promising new technology that overcomes several limitations of traditional silicon integrated circuit technology. In recent years, the potential of CNFET for analog circuit applications…

In recent years, researchers have explored use of non-volatile devices such as STT-RAM (spin torque transfer RAM) for designing on-chip caches, since they provide high density and consume low leakage power. A common limitation of all…

High performance enhancement mode semiconducting carbon nanotube field-effect transistors (CNTFETs) are obtained by combining ohmic metal-tube contacts, high dielectric constant HfO2 films as gate insulators, and electrostatically doped…

Modern multicore processors are employing large last-level caches, for example Intel's E7-8800 processor uses 24MB L3 cache. Further, with each CMOS technology generation, leakage energy has been dramatically increasing and hence, leakage…

Side-channel attacks have empowered bypassing of cryptographic components in circuits. Power side-channel (PSC) attacks have received particular traction, owing to their non-invasiveness and proven effectiveness. Aside from prior art…

A new DC thermal model of Carbon Nanotube Field Effect Transistors (CNTFETs) is proposed. The model is based on a number of fitting parameters depending on bias conditions by third order polynomials. The model includes three thermal…

Using a tight-binding mode-space NEGF technique, we explore the essential physics, design and performance potential of the III-V core-shell (CS) nanowire (NW) heterojunction TFET. The CS TFET line-tunneling current increases significantly…

This paper presents a ternary half adder and a 1-trit multiplier using carbon nanotube transistors. The proposed circuits are designed using pass transistor logic and dynamic logic. Ternary logic uses less connections than binary logic, and…