Related papers: A Highly Linear and Flexible FPGA-Based Time-to-Di…

This paper presents a low hardware consumption, resolution-configurable, automatically calibrating Gray code oscillator time-to-digital converter (TDC) in Xilinx 16nm UltraScale+, 20nm UltraScale and 28nm Virtex-7 field-programmable gate…

This paper proposes a high-speed transceiver-based method for implementing a digital-to-time converter (DTC). A real-time decoding technique is introduced to inject time information into high-speed pattern data. The stability of the…

Fully Field Programmable Gate Array (FPGA)based digitizer for high-resolution time and energy measurement is an attractive low cost solution for the readout electronics in positron emission computed tomography (PET)detector. In recent…

The design of a high-precision time-to-digital converter (TDC) based on a multiphase clock implemented using a single field-programmable gate array is discussed in this paper. The TDC can increase the resolution of the measurement by using…

We present the design and test results of a Time-to-Digital-Converter (TDC). The TDC will be a part of the readout ASIC, called ETROC, to read out Low-Gain Avalanche Detectors (LGADs) for the CMS Endcap Timing Layer (ETL) of High-Luminosity…

Time measurement plays a crucial rule for the purpose of particle identification in high energy physical experiments. With the upgrading of physical goal and the developing of electronics, modern time measurement system meets the…

A high-precision charge measurement can be achieved by the area integration of a digitized quasi-Gaussian signal after the signal passes through the shaper and analog-to-digital converter (ADC). The charge measurement contains an error due…

Recent generations of Field Programmable Gate Arrays (FPGAs) have become indispensible tools for complex state machine control and signal processing, and now routinely incorporate CPU cores to allow execution of user software code. At the…

This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…

The GANDALF 6U-VME64x/VXS module has been designed to cope with a variety of readout tasks in high energy and nuclear physics experiments, in particular the COMPASS experiment at CERN. The exchangeable mezzanine cards allow for an…

In order to reconstruct gamma-gamma physics events tagged with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2 Interaction Point (IP)…

In TDC testing or timing system implementation tasks, it is often desirable to generate signal pulses with fine adjustable time intervals. In delay cell-based schemes, the time adjustment steps are limited by the propagation delays of the…

We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a previously submitted demonstrator ASIC designed for timing…

.On the basis of requirement of CSNS, we designed a TDC chip with temperature compensation function in this paper, which employed TSMC 180nm process. Using delay unit bufx8 as the major method, delay lines in each level delayed input signal…

In most digital-to-time converter (DTC) based applications, apart from maintaining low integral non-linearity (INL), it is also required of the system to achieve a wide frequency translation range. To achieve this performance, we present a…

Muon Spin Rotation, Relaxation and Resonance ({\mu}SR) technology has an irreplaceable role in studying the microstructure and properties of materials, especially micro-magnetic properties. An experimental muon source is being built in…

A prototype of DIRC-like Time-of-Flight detector (DTOF), including a pico-second time measurement electronics, is developed and tested preliminarily. The basic structure of DTOF is composed of a fused silica radiator connected to fast…

The design and performance of wave union TDC implemented in a Lattice CertusPro-NX FPGA is discussed. This FPGA is available for radiation tolerant applications. The TDC is implemented with 16-channels and a 200 MHz reference clock. Each…

Convolutional Neural Networks are extensively used in a wide range of applications, commonly including computer vision tasks like image and video classification, recognition, and segmentation. Recent research results demonstrate that…

Identifying light mesons which contain only up/down quarks (pions) from those containing a strange quark (kaons) over the typical meter length scales of a particle physics detector requires instrumentation capable of measuring flight times…