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Related papers: Representing Gate-Level SET Faults by Multiple SEU…

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Single-event upset (SEU) fault tolerance for systems-on-chip (SoCs) in radiation-heavy environments is often addressed by architectural fault-tolerance approaches protecting individual SoC components (e.g., cores, memories) in isolation.…

Hardware Architecture · Computer Science 2026-03-30 Michael Rogenmoser , Philippe Sauter , Chen Wu , Angelo Garofalo , Luca Benini

High energy particles from cosmic rays or packaging materials can generate a glitch or a current transient (single event transient or SET) in a logic circuit. This SET can eventually get captured in a register resulting in a flip of the…

Hardware Architecture · Computer Science 2017-06-16 Nanditha P. Rao , Madhav P. Desai

In contemporary times, the increasing complexity of the system poses significant challenges to the reliability, trustworthiness, and security of the SACRES. Key issues include the susceptibility to phenomena such as instantaneous voltage…

Hardware Architecture · Computer Science 2024-12-23 Enrico Magliano , Alessio Carpegna , Alessadro Savino , Stefano Di Carlo

This paper presents a detailed evaluation of the efficiency of software-only techniques to mitigate SEU and SET in microprocessors. A set of well-known rules is presented and implemented automatically to transform an unprotected program…

Hardware Architecture · Computer Science 2023-10-02 Jose Rodrigo Azambuja , Fernando Sousa , Lucas Rosa , Fernanda Lima Kastensmidt

Very deep submicron and nanometer technologies have increased notably integrated circuit (IC) sensitiveness to radiation. Soft errors are currently appearing into ICs working at earth surface. Hardened circuits are currently required in…

Hardware Architecture · Computer Science 2011-11-09 Celia Lopez-Ongil , Mario Garcia-Valderas , Marta Portela-Garcia , Luis Entrena-Arrontes

Shrinking hardware structures and decreasing operating voltages lead to an increasing number of transient hardware faults,which thus become a core problem to consider for safety-critical systems. Here, systematic fault injection (FI), where…

Hardware Architecture · Computer Science 2023-08-11 Christian Dietrich , Tim-Marek Thomas , Matthias Mnich

With technology scaling, lower supply voltages, and higher operating frequencies clock distribution networks become more and more vulnerable to transients faults. These faults can cause circuit-wide effects and thus, significantly…

Hardware Architecture · Computer Science 2020-02-14 Thomas Lange , Maximilien Glorieux , Dan Alexandrescu , Luca Sterpone

Reliability has been a major concern in embedded systems. Higher transistor density and lower voltage supply increase the vulnerability of embedded systems to soft errors. A Single Event Upset (SEU), which is also called a soft error, can…

Hardware Architecture · Computer Science 2024-05-21 Bing Xue , Mark Zwolinski

In this paper, a fault-tolerant approach to mitigate transient and permanent faults of arithmetic and logic operations of embedded processors called FT-EALU is proposed. In this method, each operation is replicated in time and the derived…

Hardware Architecture · Computer Science 2022-04-05 Athena Abdi , Sina Shahoveisi

Safety-critical designs need to ensure reliable operations under hostile conditions with a certain degree of confidence. The continuously higher complexity of these designs makes them more susceptible to the risk of failure. ISO26262…

Software Engineering · Computer Science 2022-04-29 Endri Kaja , Nicolas Gerlin , Luis Rivas , Monideep Bora , Keerthikumara Devarajegowda , Wolfgang Ecker

Rapidly shrinking technology node and voltage scaling increase the susceptibility of Soft Errors in digital circuits. Soft Errors are radiation-induced effects while the radiation particles such as Alpha, Neutrons or Heavy Ions, interact…

Hardware Architecture · Computer Science 2021-04-06 Aneesh Balakrishnan , Thomas Lange , Maximilien Glorieux , Dan Alexandrescu , Maksim Jenihhin

Along with the complexity of electronic systems for safety-critical applications, the cost of safety mechanisms evaluation by fault injection simulation is rapidly going up. To reduce these efforts, we propose a fault injection methodology…

Hardware Architecture · Computer Science 2020-01-28 Ahmet Cagri Bagbaba , Maksim Jenihhin , Jaan Raik , Christian Sauer

Whereas contemporary Error Correcting Codes (ECC) designs occupy a significant fraction of total die area in chip-multiprocessors (CMPs), approaches to deal with the vulnerability increase of CMP architecture against Single Event Upsets…

Hardware Architecture · Computer Science 2016-07-29 Navid Khoshavi , Armin Samiei

The Check tools automate formal memory consistency model and security verification of processors by analyzing abstract models of microarchitectures, called $\mu$SPEC models. Despite the efficacy of this approach, a verification gap between…

Cryptography and Security · Computer Science 2024-10-01 Yao Hsiao , Nikos Nikoleris , Artem Khyzha , Dominic P. Mulligan , Gustavo Petri , Christopher W. Fletcher , Caroline Trippel

Logic Encryption is one of the most popular hardware security techniques which can prevent IP piracy and illegal IC overproduction. It introduces obfuscation by inserting some extra hardware into a design to hide its functionality from…

Cryptography and Security · Computer Science 2018-01-17 Rajit Karmakar , Santanu Chatopadhyay , Rohit Kapur

With increasing aging problems of advanced technologies, in-field testing becomes an inevitable challenge, on top of the already demanding requirements, such as the ISO26262 for automotive safety. SOCs used in space, automotive or military…

Hardware Architecture · Computer Science 2024-12-31 Tobias Strauch

The need for reducing manufacturing defect escape in today's safety-critical applications requires increased fault coverage. However, generating a test set using commercial automatic test pattern generation (ATPG) tools that lead to…

Cryptography and Security · Computer Science 2023-02-10 Yadi Zhong , Ujjwal Guin

A well-known testing method for the safety evaluation and real-time validation of automotive software systems (ASSs) is Fault Injection (FI). In accordance with the ISO 26262 standard, the faults are introduced artificially for the purpose…

Software Engineering · Computer Science 2026-03-19 Mohammad Abboush , Ahmad Hatahet , Andreas Rausch

Cloud computing systems fail in complex and unexpected ways due to unexpected combinations of events and interactions between hardware and software components. Fault injection is an effective means to bring out these failures in a…

Software Engineering · Computer Science 2020-10-02 Domenico Cotroneo , Luigi De Simone , Pietro Liguori , Roberto Natella

Logic Obfuscation is a well renowned design-for-trust solution to protect an Integrated Circuit (IC) from unauthorized use and illegal overproduction by including key-gates to lock the design. This is particularly necessary for ICs…

Cryptography and Security · Computer Science 2024-04-12 Haimanti Chakraborty , Ranga Vemuri
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