This paper presents a detailed evaluation of the efficiency of software-only techniques to mitigate SEU and SET in microprocessors. A set of well-known rules is presented and implemented automatically to transform an unprotected program into a hardened one. SEU and SET are injected in all sensitive areas of a MIPS-based microprocessor architecture. The efficiency of each rule and a combination of them are tested. Experimental results show the inefficiency of the control-flow techniques in detecting the majority of SEU and SET faults. Three effects of the non-detected faults are explained. The conclusions can lead designers in developing more efficient techniques to detect these types of faults.
@article{arxiv.2309.16876,
title = {Evaluating the Efficiency of Software-only Techniques to Detect SEU and SET in Microprocessors},
author = {Jose Rodrigo Azambuja and Fernando Sousa and Lucas Rosa and Fernanda Lima Kastensmidt},
journal= {arXiv preprint arXiv:2309.16876},
year = {2023}
}
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IEEE Latin American Symposium on Circuits and Systems 2010