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Related papers: ARENA: Asynchronous Reconfigurable Accelerator Rin…

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Coarse-grained reconfigurable arrays (CGRAs) are domain-specific devices promising both the flexibility of FPGAs and the performance of ASICs. However, with restricted domains comes a danger: designing chips that cannot accelerate enough…

Programming Languages · Computer Science 2023-09-19 Jackson Woodruff , Thomas Koehler , Alexander Brauckmann , Chris Cummins , Sam Ainsworth , Michael F. P. O'Boyle

Graph neural network (GNN) inference faces significant bottlenecks in preprocessing, which often dominate overall inference latency. We introduce AutoGNN, an FPGA-based accelerator designed to address these challenges by leveraging FPGA's…

Applications with irregular data structures, data-dependent control flows and fine-grained data transfers (e.g., real-world graph computations) perform poorly on cache-based systems. We propose the UpDown accelerator that supports…

This paper presents a configurable Convolutional Neural Network Accelerator (CNNA) for a System on Chip design (SoC). The goal was to accelerate inference of different deep learning networks on an embedded SoC platform. The presented CNNA…

Computer Vision and Pattern Recognition · Computer Science 2020-10-08 Kim Bjerge , Jonathan Horsted Schougaard , Daniel Ejnar Larsen

The emerging reconfigurable antenna (RA) array technology promises capacity enhancement through dynamic antenna positioning. Traditional approaches enforce half-wavelength or greater spacing among RA elements to avoid mutual coupling,…

Information Theory · Computer Science 2026-04-28 Elio Faddoul , Konstantinos Ntougias , Ioannis Krikidis

Compared to conventional general-purpose processors, accelerator-rich architectures (ARAs) can provide orders-of-magnitude performance and energy gains and are emerging as one of the most promising solutions in the age of dark silicon.…

Hardware Architecture · Computer Science 2016-11-01 Yu-Ting Chen , Jason Cong , Zhenman Fang , Bingjun Xiao , Peipei Zhou

Offloading compute intensive nested loops to execute on FPGA accelerators have been demonstrated by numerous researchers as an effective performance enhancement technique across numerous application domains. To construct such accelerators…

Hardware Architecture · Computer Science 2015-09-02 Cheng Liu , Ho-Cheung Ng , Hayden Kwok-Hay So

The objective of our research is to demonstrate the practical usage and orders of magnitude speedup of real-world applications by using alternative technologies to support high performance computing. Currently, the main barrier to the…

Astrophysics · Physics 2007-11-22 Robert J. Brunner , Volodymyr V. Kindratenko , Adam D. Myers

The increasing complexity of transformer models in artificial intelligence expands their computational costs, memory usage, and energy consumption. Hardware acceleration tackles the ensuing challenges by designing processors and…

Hardware Architecture · Computer Science 2023-12-21 Alireza Amirshahi , Giovanni Ansaloni , David Atienza

Approximate Nearest Neighbor Search (ANNS) plays a critical role in various disciplines spanning data mining and artificial intelligence, from information retrieval and computer vision to natural language processing and recommender systems.…

Data Structures and Algorithms · Computer Science 2024-07-10 Hiroyuki Ootomo , Akira Naruse , Corey Nolet , Ray Wang , Tamas Feher , Yong Wang

Scientific computing is at the core of many High-Performance Computing applications, including computational flow dynamics. Because of the uttermost importance to simulate increasingly larger computational models, hardware acceleration is…

Hardware Architecture · Computer Science 2022-01-13 Tom Hogervorst , Tong Dong Qiu , Giacomo Marchiori , Alf Birger , Markus Blatt , Razvan Nane

Computing elements of CPSs must be flexible to ensure interoperability; and adaptive to cope with the evolving internal and external state, such as battery level and critical tasks. Cryptography is a common task needed in CPSs to guarantee…

Hardware Architecture · Computer Science 2023-06-21 Francesco Ratto , Luigi Raffo , Francesca Palumbo

High intensive computation applications can usually take days to months to finish an execution. During this time, it is common to have variations of the available resources when considering that such hardware is usually shared among a…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-01-27 Kiran Mantripragada , Alecio Binotto , Leonardo P. Tizzei

With the wide adoption of large-scale Internet services and big data, the cloud has become the ideal environment to satisfy the ever-growing storage demand, thanks to its seemingly limitless capacity, high availability and faster access…

Networking and Internet Architecture · Computer Science 2015-09-07 Amina Mseddi , Mohammad Ali Salahuddin , Mohamed Faten Zhani , Halima Elbiaze , Roch H. Glitho

While coarse-grained reconfigurable arrays (CGRAs) have emerged as promising programmable accelerator architectures, pipelining applications running on CGRAs is required to ensure high maximum clock frequencies. Current CGRA compilers…

Hardware Architecture · Computer Science 2022-11-24 Jackson Melchert , Yuchen Mei , Kalhan Koul , Qiaoyi Liu , Mark Horowitz , Priyanka Raina

Heterogeneous accelerator-centric compute clusters are emerging as efficient solutions for diverse AI workloads. However, current integration strategies often compromise data movement efficiency and encounter compatibility issues in…

Hardware Architecture · Computer Science 2025-08-21 Ryan Albert Antonio , Joren Dumoulin , Xiaoling Yi , Josse Van Delm , Yunhao Deng , Guilherme Paim , Marian Verhelst

We present Canary, a scheduling architecture that allows high performance analytics workloads to scale out to run on thousands of cores. Canary is motivated by the observation that a central scheduler is a bottleneck for high performance…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-04-15 Hang Qu , Omid Mashayekhi , David Terei , Philip Levis

This paper investigates a rotatable antenna (RA) assisted mobile edge computing (MEC) network, where multiple users offload their computation tasks to an edge server equipped with an RA array under a time-division multiple access protocol.…

Information Theory · Computer Science 2026-03-17 Ji Wang , Hao Chen , Yixuan Li , Jun Zhang , Xingwang Li , Ming Zeng , Octavia A. Dobre

In recent years, convolutional neural networks (CNNs) have demonstrated their ability to solve problems in many fields and with accuracy that was not possible before. However, this comes with extensive computational requirements, which made…

Neural and Evolutionary Computing · Computer Science 2022-09-26 Sadiq M. Sait , Aiman El-Maleh , Mohammad Altakrouri , Ahmad Shawahna

Experience shows that on today's high performance systems the utilization of different acceleration cards in conjunction with a high utilization of all other parts of the system is difficult. Future architectures, like exascale clusters,…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-03-07 Patrick Diehl , Madhavan Seshadri , Thomas Heller , Hartmut Kaiser