Related papers: CentOS Linux for the ATLAS MUCTPI Upgrade

ALICE (A Large Ion Collider Experiment) is the heavy-ion detector designed to study the strongly interacting state of matter realized in relativistic heavy-ion collisions at the CERN Large Hadron Collider (LHC). A major upgrade of the…

This paper presents a real-time application of the 16-bit fixed point Digital Signal Processors (DSPs), in the Muon System of the D0 detector located at the Fermilab Tevatron, presently the world's highest-energy hadron collider. As part of…

The goals of the ongoing and planned ATLAS muon detector upgrades are to increase the acceptance for precision muon momentum measurement and triggering and to improve the rate capability of the muon chambers in the high-background regions…

The Fast Tracker (FTK) is a proposed upgrade to the ATLAS trigger system that will operate at full Level-1 output rates and provide high quality tracks reconstructed over the entire detector by the start of processing in Level-2. FTK solves…

Modern UAV architectures increasingly aim to unify high-level autonomy and low-level flight control on a single General-Purpose Operating System (GPOS). However, complex multi-core System-on-Chips (SoCs) introduce significant timing…

The present article introduces a novel ASIC architecture, designed in the context of the ATLAS Tile Calorimeter upgrade program for the High-Luminosity phase of the Large Hadron Collider at CERN. The architecture is based on…

SHiP (Search for Hidden Particles) is a proposed experiment to be installed at CERN, with the aim of exploring the high intensity beam frontier to investigate the so-called Hidden sector. Since the SPS proton beam interacting with the SHiP…

Autonomous Micro Aerial Vehicles (MAVs), with a form factor of 10cm in diameter, are an emerging technology thanks to the broad applicability enabled by their onboard intelligence. However, these platforms are strongly limited in the…

The ATLAS Fast TracKer (FTK) was designed to provide full tracking for the ATLAS high-level trigger by using pattern recognition based on Associative Memory (AM) chips and fitting in high-speed field programmable gate arrays. The tracks…

As the Large Hadron Collider (LHC) continues its upward progression in energy and luminosity towards the planned High-Luminosity LHC (HL-LHC) in 2025, the challenges of the experiments in processing increasingly complex events will also…

Computing demands for large scientific experiments, such as the CMS experiment at the CERN LHC, will increase dramatically in the next decades. To complement the future performance increases of software running on central processing units…

At the LHC, muons are produced in many final states and used in a variety of analysis, such as Standard Model precision measurements and searches for new physics. The B-physics programme in ATLAS includes the measurement of CP violating…

The innermost part of the ATLAS experiment at the LHC, CERN, will be a pixel detector. The command messages and the readout data of the detector are transmitted over an optical data path. The readout chain consists of many components which…

First Experiences Integrating PC Distributed I/O Into Argonne's ATLAS Control System The roots of ATLAS (Argonne Tandem-Linac Accelerator System) date back to the early 1960s. Located at the Argonne National Laboratory, the accelerator has…

As the complexity of the scan algorithm is dependent on the number of design registers, large SoC scan designs can no longer be verified in RTL simulation unless partitioned into smaller sub-blocks. This paper proposes a methodology to…

The Linear Collider TPC collaboration constructed a Large Prototype TPC (LPTPC) which is now installed at the EUDET facility, in DESY. The SiLC-collaboration (Silicon for the Linear Collider) will install position sensitive silicon strip…

Since the end of Run 1 of the LHC in 2012, the outermost ring has been added to the CMS Cathode Strip Chambers (CSC) endcap muon detector, and the readout electronics of the innermost ring of CSCs have been upgraded to accommodate the…

Modern heterogeneous System-on-Chip (SoC) devices integrate advanced components into a single package, offering powerful capabilities while also introducing significant complexity. To manage these sophisticated devices, firmware and…

The High Level Trigger (HLT) of the future ALICE heavy-ion experiment has to reduce its input data rate of up to 25 GB/s to at most 1.25 GB/s for output before the data is written to permanent storage. To cope with these data rates a large…

A front-end readout electronics system has been developed for silicon strip detectors. The system uses an application specific integrated circuit (ASIC) ATHED to realize multi-channel E&T measurement. The slow control of ASIC chips is…