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Modern processors are increasingly featuring multiple cores, as well as support for hardware virtualization. While these processors are common in desktop and server-class computing, they are less prevalent in embedded and real-time systems.…

Operating Systems · Computer Science 2013-10-25 Richard West , Ye Li , Eric Missimer

High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) has recently emerged as a suitable solution to address this…

Hardware Architecture · Computer Science 2023-09-06 Jie Chen , Igor Loi , Eric Flamand , Giuseppe Tagliavini , Luca Benini , Davide Rossi

While Transformers are dominated by Floating-Point (FP) Matrix-Multiplications, their aggressive acceleration through dedicated hardware or many-core programmable systems has shifted the performance bottleneck to non-linear functions like…

Hardware Architecture · Computer Science 2025-04-16 Run Wang , Gamze Islamoglu , Andrea Belano , Viviane Potocnik , Francesco Conti , Angelo Garofalo , Luca Benini

In order to protect the security of network data, a high speed chip module for encrypting and decrypting of network data packet is designed. The chip module is oriented for internet information security SOC (System on Chip) design. During…

Hardware Architecture · Computer Science 2014-01-27 Yixin Liu , Haipeng Zhang , Tao Feng

Superconducting qubits provide a promising approach to large-scale fault-tolerant quantum computing. However, qubit connectivity on a planar surface is typically restricted to only a few neighboring qubits. Achieving longer-range and more…

Computing-in-memory (CIM) is renowned in deep learning due to its high energy efficiency resulting from highly parallel computing with minimal data movement. However, current SRAM-based CIM designs suffer from long latency for loading…

With the shrinking of technology nodes and the use of parallel processor clusters in hostile and critical environments, such as space, run-time faults caused by radiation are a serious cross-cutting concern, also impacting architectural…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-30 Michael Rogenmoser , Nils Wistoff , Pirmin Vogel , Frank Gürkaynak , Luca Benini

The performance of any elliptic curve cryptography hardware accelerator significantly relies on the efficiency of the underlying point multiplication (PM) architecture. This article presents a hardware implementation of field-programmable…

Flexible electronics offer unique advantages for conformable, lightweight, and disposable healthcare wearables. However, their limited gate count, large feature sizes, and high static power consumption make on-body machine learning…

Machine Learning · Computer Science 2025-11-11 Theofanis Vergos , Polykarpos Vergos , Mehdi B. Tahoori , Georgios Zervakis

Speculative attacks are still an active threat today that, even if initially focused on the x86 platform, reach across all modern hardware architectures. RISC-V is a newly proposed open instruction set architecture that has seen traction…

Cryptography and Security · Computer Science 2023-11-08 Ruxandra Bălucea , Paul Irofti

Rivest-Shamir-Adleman (RSA) cryptosystem uses modular multiplication for encryption and decryption. So, performance of RSA can be drastically improved by optimizing modular multiplication. This paper proposes a new parallel, high-radix…

Hardware Architecture · Computer Science 2020-09-09 Javad Bagherzadeh , Vishishtha Bothra , Disha Gujar , Sugandha Gupta , Jinal Shah

Fast combinational multipliers with large bit widths can occupy significant silicon area, which also drives up power consumption. Area can be reduced through resource sharing (i.e., folding) at the expense of lower throughput, which is…

Hardware Architecture · Computer Science 2025-09-03 Ahmad Houraniah , H. Fatih Ugurdag , C. Emre Dedeagac

In the modern Systems-on-Chip (SoC), the Advanced eXtensible Interface (AXI) protocol exhibits security vulnerabilities, enabling partial or complete denial-of-service (DoS) through protocol-violation attacks. The recent countermeasures…

Cryptography and Security · Computer Science 2026-01-19 Wadid Foudhaili , Aykut Rencber , Anouar Nechi , Rainer Buchty , Mladen Berekovic , Andres Gomez , Saleh Mulhem

FPGA overlays are commonly implemented as coarse-grained reconfigurable architectures with a goal to improve designers' productivity through balancing flexibility and ease of configuration of the underlying fabric. To truly facilitate full…

Hardware Architecture · Computer Science 2016-06-22 Ho-Cheung Ng , Cheng Liu , Hayden Kwok-Hay So

Gaussian processes are widely used in machine learning domains but remain computationally demanding, limiting their efficient scalability across emerging hardware platforms. The GPRat library addresses these challenges using the HPX…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-29 Alexander Strack , Patrick Diehl , Dirk Pflüger

Neural networks are increasingly used in real-time systems, such as automated driving applications. This requires high-performance hardware with predictable timing behavior. State-of-the-art real-time hardware is limited in memory and…

Hardware Architecture · Computer Science 2024-10-15 Maximilian Kirschner , Konstantin Dudzik , Jürgen Becker

The open-source RISC-V ISA is gaining traction, both in industry and academia. The ISA is designed to scale from micro-controllers to server-class processors. Furthermore, openness promotes the availability of various open-source and…

Hardware Architecture · Computer Science 2019-11-26 Florian Zaruba , Luca Benini

Open-source RISC-V cores are increasingly adopted in high-end embedded domains such as automotive, where maximizing instructions per cycle (IPC) is becoming critical. Building on the industry-supported open-source CVA6 core and its…

Rapid advancements in RISC-V hardware development shift the focus from low-level optimizations to higher-level parallelization. Recent RISC-V processors, such as the SOPHON SG2042, have 64 cores. RISC-V processors with core counts…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-11 Alexander Strack , Christopher Taylor , Dirk Pflüger

Modern Intel CPUs reduce their frequency when executing wide vector operations (AVX2 and AVX-512 instructions), as these instructions increase power consumption. The frequency is only increased again two milliseconds after the last code…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-01-16 Mathias Gottschlag , Frank Bellosa