Related papers: A 128-point Multi-Path SC FFT Architecture
Universal multiport interferometers, which can be programmed to implement any linear transformation between multiple channels, are emerging as a powerful tool for both classical and quantum photonics. These interferometers are typically…
In this article it is presented an FPGA based $M$ulti-$V$oltage $T$hreshold (MVT) system which allows of sampling fast signals ($1-2$ ns rising and falling edge) in both voltage and time domain. It is possible to achieve a precision of time…
This two-part paper explores the use of FP in the design and optimization of communication systems. Part I of this paper focuses on FP theory and on solving continuous problems. The main theoretical contribution is a novel quadratic…
A key scalability challenge in neural solvers for industrial-scale physics simulations is efficiently capturing both fine-grained local interactions and long-range global dependencies across millions of spatial elements. We introduce the…
The main objective of this project is to design the full-rate Space-Time-Frequency Trellis code (STFTC), which is based on Quasi-Orthogonal designs for Multiple-Input Multiple-Output (MIMO) Orthogonal Frequency Division Multiplexing (OFDM)…
Space-division multiplexing (SDM) is one of the key enabling technologies to increase the capacity of fiber communication systems. However, implementing SDM-based systems using multimode fiber has been challenging with the need for compact,…
Interest in parallel architectures applied to real time selections is growing in High Energy Physics (HEP) experiments. In this paper we describe performance measurements of Graphic Processing Units (GPUs) and Intel Many Integrated Core…
In this paper, we investigate the problem of two-way relay beamforming optimization to maximize the achievable sum-rate of a simultaneous wireless information and power transfer (SWIPT) system with a full-duplex (FD) multiple-input…
Data-parallel problems demand ever growing floating-point (FP) operations per second under tight area- and energy-efficiency constraints. In this work, we present Manticore, a general-purpose, ultra-efficient chiplet-based architecture for…
Large-scale programmable photonic circuits are opening up new possibilities for information processing providing fast and energy-efficient means for matrix-vector multiplication. Here, we introduce a novel architecture of photonic circuits…
Space-division multiplexing (SDM) with multicore fibers (MCFs) is envisioned to overcome the capacity crunch in optical fiber communications. Within these systems, the coupling optics that connect single-mode fibers (SMFs) to MCFs are key…
Multi-site testing is a popular and effective way to increase test throughput and reduce test costs. We present a test throughput model, in which we focus on wafer testing, and consider parameters like test time, index time, abort-on-fail,…
As processes continue to scale aggressively, the design of deep sub-micron, mixed-signal design is becoming more and more challenging. In this paper we present an analysis of scaling multi-core mixed-signal neuromorphic processors to…
Modern radio telescopes like the Square Kilometer Array (SKA) will need to process in real-time exabytes of radio-astronomical signals to construct a high-resolution map of the sky. Near-Memory Computing (NMC) could alleviate the…
An ultra-high throughput low-density parity check (LDPC) decoder with an unrolled full-parallel architecture is proposed, which achieves the highest decoding throughput compared to previously reported LDPC decoders in the literature. The…
High-fidelity native multi-qubit operations are crucial to efficient quantum circuit compilation due to their ability of shortening circuit depth and enhence the performance. However, the design and implementation of these gates remain a…
This paper presents an in-memory computing (IMC) architecture for image denoising. The proposed SRAM based in-memory processing framework works in tandem with approximate computing on a binary image generated from neuromorphic vision…
The strong anharmonicity and high coherence times inherent to fluxonium superconducting circuits are beneficial for quantum information processing. In addition to requiring high-quality physical qubits, a quantum processor needs to be…
Convex optimization methods are employed to optimize a real-time (RT) system-on-chip (SoC) under a variety of physical resource-driven constraints, demonstrated on an industry MPEG2 encoder SoC. The power optimization is compared to…
We have implemented fast Fourier transforms for one, two, and three-dimensional arrays on the Cerebras CS-2, a system whose memory and processing elements reside on a single silicon wafer. The wafer-scale engine (WSE) encompasses a…