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Related papers: Fetch-Directed Instruction Prefetching Revisited

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The growing pressure on cloud application scalability has accentuated storage performance as a critical bottle- neck. Although cache replacement algorithms have been extensively studied, cache prefetching - reducing latency by retrieving…

Performance · Computer Science 2017-05-23 Juncheng Yang , Reza Karimi , Trausti Sæmundsson , Avani Wildani , Ymir Vigfusson

Cross-modal hashing, favored for its effectiveness and efficiency, has received wide attention to facilitating efficient retrieval across different modalities. Nevertheless, most existing methods do not sufficiently exploit the…

Computer Vision and Pattern Recognition · Computer Science 2021-05-18 Xin Liu , Xingzhi Wang , Yiu-ming Cheung

Federated learning (FL) is a machine learning paradigm that facilitates massively distributed model training with end-user data on edge devices directed by a central server. However, the large number of heterogeneous clients in FL…

Machine Learning · Computer Science 2025-04-23 Qifan Yan , Andrew Liu , Shiqi He , Mathias Lécuyer , Ivan Beschastnikh

Fast and scalable metadata management across multiple metadata servers is crucial for distributed file systems to handle numerous files and directories. Client-side caching of frequently accessed metadata can mitigate server loads, but…

Hardware Architecture · Computer Science 2026-05-06 Qingxiu Liu , Jiazhen Cai , Siyuan Sheng , Yuhui Chen , Lu Tang , Zhirong Shen , Patrick P. C. Lee

High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) has recently emerged as a suitable solution to address this…

Hardware Architecture · Computer Science 2023-09-06 Jie Chen , Igor Loi , Eric Flamand , Giuseppe Tagliavini , Luca Benini , Davide Rossi

Virtual-to-physical address translation is a critical performance bottleneck in paging-based virtual memory systems. The Translation Lookaside Buffer (TLB) accelerates address translation by caching frequently accessed mappings, but TLB…

Hardware Architecture · Computer Science 2026-03-23 Melkamu Mersha , Tsion Abay , Mingziem Bitewa , Gedare Bloom

Transferring knowledge from large source datasets is an effective way to fine-tune the deep neural networks of the target task with a small sample size. A great number of algorithms have been proposed to facilitate deep transfer learning,…

Machine Learning · Computer Science 2020-07-21 Xingjian Li , Haoyi Xiong , Haozhe An , Chengzhong Xu , Dejing Dou

The substantial computational and memory demands of Large Language Models (LLMs) hinder their deployment. Block Floating Point (BFP) has proven effective in accelerating linear operations, a cornerstone of LLM workloads. However, as…

Hardware Architecture · Computer Science 2025-02-10 Hui Wang , Yuan Cheng , Xiaomeng Han , Zhengpeng Zhao , Dawei Yang , Zhe Jiang

As SRAM-based caches are hitting a scaling wall, manufacturers are integrating DRAM-based caches into system designs to continue increasing cache sizes. While DRAM caches can improve the performance of memory systems, existing DRAM cache…

Caches only exploit spatial and temporal locality in a set of address referenced in a program. Due to dynamic construction of linked data-structures, they are difficult to cache as the spatial locality between the nodes is highly dependent…

Hardware Architecture · Computer Science 2018-01-25 Nitish Kumar Srivastava , Akshay Dilip Navalakha

Factorization and multiplication of dense matrices and tensors are critical, yet extremely expensive pieces of the scientific toolbox. Careful use of low rank approximation can drastically reduce the computation and memory requirements of…

Performance · Computer Science 2023-11-15 Sameer Deshmukh , Rio Yokota , George Bosilca

Distributed tracing serves as a fundamental building block in the monitoring and testing of cloud service systems. To reduce computational and storage overheads, the de facto practice is to capture fewer traces via sampling. However,…

Software Engineering · Computer Science 2025-04-15 Zhuangbin Chen , Junsong Pu , Zibin Zheng

We show in this work that memory intensive computations can result in severe performance problems due to off-chip memory access and CPU-GPU context switch overheads in a wide range of deep learning models. For this problem, current…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-12-20 Zhen Zheng , Pengzhan Zhao , Guoping Long , Feiwen Zhu , Kai Zhu , Wenyi Zhao , Lansong Diao , Jun Yang , Wei Lin

The amounts of data that need to be transmitted, processed, and stored by the modern deep neural networks have reached truly enormous volumes in the last few years calling for the invention of new paradigms both in hardware and software…

Machine Learning · Computer Science 2022-11-08 Ilya Soloveychik , Ilya Lyubomirsky , Xin Wang , Sudeep Bhoja

In the Fully Sharded Data Parallel (FSDP) training pipeline, collective operations can be interleaved to maximize the communication/computation overlap. In this scenario, outstanding operations such as Allgather and Reduce-Scatter can…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-11-12 Mikhail Khalilov , Salvatore Di Girolamo , Marcin Chrapek , Rami Nudelman , Gil Bloch , Torsten Hoefler

Studies on backdoor attacks in recent years suggest that an adversary can compromise the integrity of a deep neural network (DNN) by manipulating a small set of training samples. Our analysis shows that such manipulation can make the…

Computer Vision and Pattern Recognition · Computer Science 2024-09-04 Nazmul Karim , Abdullah Al Arafat , Adnan Siraj Rakin , Zhishan Guo , Nazanin Rahnavard

As memory capacity has outstripped TLB coverage, large data applications suffer from frequent page table walks. We investigate two complementary techniques for addressing this cost: reducing the number of accesses required and reducing the…

Hardware Architecture · Computer Science 2021-09-03 Chang Hyun Park , Ilias Vougioukas , Andreas Sandberg , David Black-Schaffer

Multi-task model training has been adopted to enable a single deep neural network model (often a large language model) to handle multiple tasks (e.g., question answering and text summarization). Multi-task training commonly receives input…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-20 Chenyu Jiang , Zhen Jia , Shuai Zheng , Yida Wang , Chuan Wu

Data prefetching--loading data into the cache before it is requested--is essential for reducing I/O overhead and improving database performance. While traditional prefetchers focus on sequential patterns, recent learning-based approaches,…

Databases · Computer Science 2025-10-14 Farzaneh Zirak , Farhana Choudhury , Renata Borovica-Gajic

Network algorithms always prefer low memory cost and fast packet processing speed. Forwarding information base (FIB), as a typical network processing component, requires a scalable and memory-efficient algorithm to support fast lookups. In…

Networking and Internet Architecture · Computer Science 2017-11-23 Ye Yu , Djamal Belazzougui , Chen Qian , Qin Zhang