English
Related papers

Related papers: Addressing Variability in Reuse Prediction for Las…

200 papers

Large language models (LLMs) have excelled in various applications, yet serving them at scale is challenging due to their substantial resource demands and high latency. Our real-world studies reveal that over 70% of user requests to LLMs…

Machine Learning · Computer Science 2025-09-05 Yifan Yu , Yu Gan , Nikhil Sarda , Lillian Tsai , Jiaming Shen , Yanqi Zhou , Arvind Krishnamurthy , Fan Lai , Henry M. Levy , David Culler

Although benefits from caching in US HEP are well-known, current caching strategies are not adaptive i.e they do not adapt to changing cache access patterns. Newer developments such as the High-Luminosity - Large Hadron Collider (HL-LHC),…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-24 Venkat Sai Suman Lamba Karanam , Sarat Sasank Barla , Byrav Ramamurthy , Derek Weitzel

We make three observations in modern processors: (1) LLC capacity is getting larger (up to 1GB); (2) core counts are increasing (up to 128 cores), accumulating a more significant amount of private L2 cache capacity on the chip; and (3)…

Hardware Architecture · Computer Science 2023-03-01 Majid Jalili , Mattan Erez

In recent years, high interest in using Virtual Machines (VMs) in data centers and Cloud computing has significantly increased the demand for high-performance data storage systems. Recent studies suggest using SSDs as a caching layer for…

Hardware Architecture · Computer Science 2018-05-04 Saba Ahmadian , Onur Mutlu , Hossein Asadi

Solid-State Drives (SSDs) have significant performance advantages over traditional Hard Disk Drives (HDDs) such as lower latency and higher throughput. Significantly higher price per capacity and limited lifetime, however, prevents…

Hardware Architecture · Computer Science 2021-11-08 Shahriar Ebrahimi , Reza Salkhordeh , Seyed Ali Osia , Ali Taheri , Hamid Reza Rabiee , Hossein Asadi

DRAM-based memory is a critical factor that creates a bottleneck on the system performance since the processor speed largely outperforms the DRAM latency. In this thesis, we develop a low-cost mechanism, called ChargeCache, which enables…

Hardware Architecture · Computer Science 2016-09-26 Hasan Hassan

Caching systems using the Least Recently Used (LRU) principle have now become ubiquitous. A fundamental question for these systems is whether the cache space should be pooled together or divided to serve multiple flows of data item requests…

Performance · Computer Science 2017-08-08 Jian Tan , Guocong Quan , Kaiyi Ji , Ness Shroff

Much research has shown that applications have variable runtime cache requirements. In the context of the increasingly popular Spin-Transfer Torque RAM (STT-RAM) cache, the retention time, which defines how long the cache can retain a cache…

Hardware Architecture · Computer Science 2019-05-20 Kyle Kuan , Tosiron Adegbija

The increasing adoption of large language models (LLMs) with extended context windows necessitates efficient Key-Value Cache (KVC) management to optimize inference performance. Inference workloads like Retrieval-Augmented Generation (RAG)…

Emerging Technologies · Computer Science 2025-05-29 Yue Zhu , Hao Yu , Chen Wang , Zhuoran Liu , Eun Kyung Lee

This paper presents VLCache, a cache reuse framework that exploits both Key-Value (KV) cache and encoder cache from prior multimodal inputs to eliminate costly recomputation when the same multimodal inputs recur. Unlike previous heuristic…

Computer Vision and Pattern Recognition · Computer Science 2025-12-19 Shengling Qin , Hao Yu , Chenxin Wu , Zheng Li , Yizhong Cao , Zhengyang Zhuge , Yuxin Zhou , Wentao Yao , Yi Zhang , Zhengheng Wang , Shuai Bai , Jianwei Zhang , Junyang Lin

The increasing complexity of AI tasks has shifted the paradigm from monolithic models toward multi-agent large language model (LLM) systems. However, these collaborative architectures introduce a critical bottleneck: redundant prefill…

Machine Learning · Computer Science 2026-03-17 Yingsheng Geng , Yuchong Gao , Weihong Wu , Guyue Liu , Jiang Liu

The error correcting performance of multi-level-cell (MLC) NAND flash memory is closely related to the block length of error correcting codes (ECCs) and log-likelihood-ratios (LLRs) of the read-voltage thresholds. Driven by this issue, this…

Information Theory · Computer Science 2020-04-14 Cheng Wang , Kang Wei , Lingjun Kong , Long Shi , Zhen Mei , Jun Li , Kui Cai

Caches in Content-Centric Networks (CCN) are increasingly adopting flash memory based storage. The current flash cache technology stores all files with the largest possible expiry date, i.e. the files are written in the memory so that they…

Networking and Internet Architecture · Computer Science 2016-06-24 Samta Shukla , Alhussein A. Abouzeid

With technology scaling, the size of cache systems in chip-multiprocessors (CMPs) has been dramatically increased to efficiently store and manipulate a large amount of data in future applications and decrease the gap between cores and…

Hardware Architecture · Computer Science 2022-01-04 Pooneh Safayenikoo , Arghavan Asad , Mahmood Fathy

Many real-world applications require machine-learning models to be able to deal with non-stationary data distributions and thus learn autonomously over an extended period of time, often in an online setting. One of the main challenges in…

Machine Learning · Computer Science 2025-07-22 Giuseppe Serra , Ben Werner , Florian Buettner

The proliferation of fast, dense, byte-addressable nonvolatile memory suggests that data might be kept in pointer-rich "in-memory" format across program runs and even process and system crashes. For full generality, such data requires…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-17 Wentao Cai , Haosen Wen , H. Alan Beadle , Chris Kjellqvist , Mohammad Hedayati , Michael L. Scott

In recent years, the size and leakage energy consumption of large last level caches (LLCs) has increased. To address this, embedded DRAM (eDRAM) caches have been considered which have lower leakage energy consumption; however eDRAM caches…

Hardware Architecture · Computer Science 2013-09-30 Sparsh Mittal

Mobile edge Large Language Model (LLM) deployments face inherent constraints, such as limited computational resources and network bandwidth. Although Retrieval-Augmented Generation (RAG) mitigates some challenges by integrating external…

Networking and Internet Architecture · Computer Science 2025-01-17 Guangyuan Liu , Yinqiu Liu , Jiacheng Wang , Hongyang Du , Dusit Niyato , Jiawen Kang , Zehui Xiong

In any caching system, the admission and eviction policies determine which contents are added and removed from a cache when a miss occurs. Usually, these policies are devised so as to mitigate staleness and increase the hit probability.…

Networking and Internet Architecture · Computer Science 2016-11-15 Mostafa Dehghan , Laurent Massoulie , Don Towsley , Daniel Menasche , Y. C. Tay

Retrieval-Augmented Generation (RAG) has shown significant improvements in various natural language processing tasks by integrating the strengths of large language models (LLMs) and external knowledge databases. However, RAG introduces long…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-26 Chao Jin , Zili Zhang , Xuanlin Jiang , Fangyue Liu , Xin Liu , Xuanzhe Liu , Xin Jin
‹ Prev 1 3 4 5 6 7 10 Next ›