Related papers: Stack up your chips: Betting on 3D integration to …
The major challenge when designing multipliers for FPGAs is to address several trade-offs: On the one hand at the performance level and on the other hand at the resource level utilizing DSP blocks or look-up tables (LUTs). With DSPs being a…
Complementary metal-oxide semiconductor (CMOS) technology has radically reshaped the world by taking humanity to the digital age. Cramming more transistors into the same physical space has enabled an exponential increase in computational…
The sixth-generation (6G) wireless networks are expected to deliver ubiquitous connectivity, resilient coverage, and intelligence-driven services in highly dynamic environments. To achieve these goals, distributed wireless architectures…
According to the well-known loop-shaping control design approach, the steady-state precision of control systems can be improved by stacking integrators. However, due to the waterbed effect in linear control systems, such an action will…
The integration of more renewable energy sources into the power system is presenting system operators with various challenges. At the distribution system level, voltage magnitudes that violate operating limits near large photovoltaic…
Large number of cores and hardware resource sharing are two characteristics on multicore processors, which bring new challenges for the design of operating systems. How to locate and analyze the speedup restrictive factors in operating…
Parallel and monolithic 3D integration directions offer pathways to realize 3D integrated circuits (ICs) but still lead to layer-by-layer implementations, each functional layer being composed in 2D first. This mindset causes challenging…
Vertically integrated (3D) combinations of sensors and electronics provide the ability to fabricate small, fine pitch pixels with very small total capacitance monolithically integrated with complex circuitry. The small capacitance, enabled…
Undoubtedly faster, larger and lower power per bit, but just how do you go about interfacing a DDR3 SDRAM DIMM to an FPGA? The DDR3 standard addresses the faster, more bandwidth and lower power per bit need, but it introduces new design…
While reduction in feature size makes computation cheaper in terms of latency, area, and power consumption, performance of emerging data-intensive applications is determined by data movement. These trends have introduced the concept of…
Memory latency, bandwidth, capacity, and energy increasingly limit performance. In this paper, we reconsider proposed system architectures that consist of huge (many-terabyte to petabyte scale) memories shared among large numbers of CPUs.…
The rapidly increasing demands for computational throughput, bandwidth, and memory capacity fueled by breakthroughs in machine learning pose substantial challenges for conventional electronic computing platforms. For digital scaling to keep…
The remarkable success of foundation models has been driven by scaling laws, demonstrating that model performance improves predictably with increased training data and model size. However, this scaling trajectory faces two critical…
Three-dimensional (3D) photonic integrated circuits (PIC) are emerging as an indispensable scheme for high density and multifunctional photonic systems. However, the wafer-scale scaling of PICs towards a 3D configuration is constrained by…
The edge computing paradigm has emerged to handle cloud computing issues such as scalability, security and low response time among others. This new computing trend heavily relies on ubiquitous embedded systems on the edge. Performance and…
Network-on-Chips (NoCs) have been widely employed in the design of multiprocessor system-on-chips (MPSoCs) as a scalable communication solution. NoCs enable communications between on-chip Intellectual Property (IP) cores and allow those…
Machine learning has the potential to automate molecular design and drastically accelerate the discovery of new functional compounds. Towards this goal, generative models and reinforcement learning (RL) using string and graph…
The matching of multiple objects (e.g. shapes or images) is a fundamental problem in vision and graphics. In order to robustly handle ambiguities, noise and repetitive patterns in challenging real-world settings, it is essential to take…
As the demand for high-speed and low-power electronics continues to grow, the quasi-delay-insensitive (QDI) asynchronous domain of digital design has emerged as a promising alternative to traditional clock-based designs. However, the…
Developing a packaging scheme that meets all of the requirements for operation of solid-state qubits in a cryogenic environment can be a formidable challenge. In this article, we discuss work being done in our group as well as in the…