Related papers: Measurements of Single Event Upset in ATLAS IBL

The upcoming ATLAS Phase II upgrade mandates replacing the tracking system with the all-silicon Inner Tracker (ITK), featuring a pixel detector as its core element. The monitoring data of the new system will be aggregated from an…

A new physics-based model for analytical calculation of Soft Error Rate (SER) in digital memory circuits under the influence of heavy ions in space orbits is proposed. This method is based on parameters that are uniquely determined from the…

We present a multi-layer single-event upset mitigation strategy implemented in a low-cost Xilinx Artix-7 FPGA. The implementation is targeted for a trigger data router for the ATLAS muon spectrometer upgrade. The mitigation strategy employs…

Reliability has been a major concern in embedded systems. Higher transistor density and lower voltage supply increase the vulnerability of embedded systems to soft errors. A Single Event Upset (SEU), which is also called a soft error, can…

The ATLAS Insertable B-Layer (IBL) detector was installed into the ATLAS experiment in 2014 and has been in operation since 2015. During the first year of IBL data taking an increase of the low voltage currents associated with the FE-I4…

We experimentally characterise the impedance of a single electron transistor (SET) at an excitation frequency comparable to the electron tunnel rate. Differently from usual rf-SET operations, the excitation signal is applied to the gate of…

With increasing aging problems of advanced technologies, in-field testing becomes an inevitable challenge, on top of the already demanding requirements, such as the ISO26262 for automotive safety. SOCs used in space, automotive or military…

Telegraph noise, which originates from the switching of charge between meta-stable trapping sites, becomes increasingly important as device sizes approach the nano-scale. For charge-based quantum computing, this noise may lead to…

The innermost part of the tracking detector of the ATLAS experiment consists mainly of planar n$^+$-in-n silicon pixel sensors. During the phase-0 upgrade, the Insertable B-Layer (IBL) was installed closest to the beam pipe. Its pixels are…

Single Electron Transistors (SETs) are nanoscale electrometers of unprecedented sensitivity, and as such have been proposed as read-out devices in a number of quantum computer architectures. We show that the functionality of a standard SET…

In this article, we investigate the Single Events Effects (SEE) leading to Single Event Burnout (SEB) in $\beta$-Ga$_2$O$_3$ MOSFETs. Using Silvaco TCAD, 2D simulations were performed to understand the mechanism behind the SEB mechanism in…

The single electron transistor (SET) offers unparalled opportunities as a nano-scale electrometer, capable of measuring sub-electron charge variations. SETs have been proposed for read-out schema in solid-state quantum computing where…

The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and…

The ATLAS Insertable B-Layer (IBL) collaboration plans to insert a fourth pixel layer inside the present Pixel Detector to recover from eventual failures in the current pixel system, especially the b-layer. Additionally the IBL will ensure…

In future experiments the readout electronics for pixel detectors is required to be resistant to a very high radiation level. In this paper we report on irradiation tests performed on several preFPIX2 prototype pixel readout chips for the…

This study explores the critical but underexamined impact of label noise on Sound Event Detection (SED), which requires both sound identification and precise temporal localization. We categorize label noise into deletion, insertion,…

The ATLAS experiment pixel detector upgrade plans are focused on development of new technology, including the FE-I4 readout integrated circuit. The first upgrade project to make use of this new technology is an "Insertable B-Layer" (IBL)…

Single-event upset (SEU) fault tolerance for systems-on-chip (SoCs) in radiation-heavy environments is often addressed by architectural fault-tolerance approaches protecting individual SoC components (e.g., cores, memories) in isolation.…

Single Image Super-Resolution (SISR) is a fundamental computer vision task that aims to reconstruct a high-resolution (HR) image from a low-resolution (LR) input. Transformer-based methods have achieved remarkable performance by modeling…

We calculate the full frequency spectral density of voltage fluctuations in a Single Electron Transistor (SET), used as an electrometer biased above the Coulomb threshold so that the current through the SET is carried by sequential tunnel…