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DSLs and hardware accelerators have proven to be very effective in optimizing computationally expensive workloads. In this paper, we propose a solution to the challenge of manually rewriting legacy or unoptimized code in domain-specific…

Programming Languages · Computer Science 2023-08-15 Yuto Nishida , Sahil Bhatia , Shadaj Laddad , Hasan Genc , Yakun Sophia Shao , Alvin Cheung

The rapid advancements in artificial intelligence (AI), particularly the Large Language Models (LLMs), have profoundly affected our daily work and communication forms. However, it is still a challenge to deploy LLMs on resource-constrained…

Hardware Architecture · Computer Science 2025-03-03 Mingqiang Huang , Ao Shen , Kai Li , Haoxiang Peng , Boyu Li , Yupeng Su , Hao Yu

Our aim for the ML Contest for Chip Design with HLS 2024 was to predict the validity, running latency in the form of cycle counts, utilization rate of BRAM (util-BRAM), utilization rate of lookup tables (uti-LUT), utilization rate of flip…

Artificial Intelligence · Computer Science 2024-12-17 Ali Emre Oztas , Mahdi Jelodari

Heterogeneous computing systems, which combine general-purpose processors with specialized accelerators, are increasingly important for optimizing the performance of modern applications. A central challenge is to decide which parts of an…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-15 Martin Wilhelm , Franz Freitag , Max Tzschoppe , Thilo Pionteck

Hardware design faces a fundamental challenge: raising abstraction to improve productivity while maintaining control over low-level details like cycle accuracy. Traditional RTL design in languages like SystemVerilog composes modules through…

Programming Languages · Computer Science 2025-11-20 Youwei Xiao , Zizhang Luo , Weijie Peng , Yuyang Zou , Yun Liang

Accelerating applications through the design of hardware accelerators can significantly enhance system performance and energy efficiency. Despite advances, such as high-level synthesis (HLS), designing accelerators for complex applications…

Hardware Architecture · Computer Science 2026-05-18 Abinand Nallathambi , Christopher Knight , Shantanu Ganguly , Wilfried Haensch , Anand Raghunathan

Functional languages as input specifications for High-Level Synthesis (HLS) tools allow to specify data dependencies but do not contain a notion of time nor execution order. In this paper, we propose a method to add this notion to the…

Hardware Architecture · Computer Science 2025-04-11 Hendrik Folmer , Robert de Groote , Marco Bekooij

Transformers are considered one of the most important deep learning models since 2018, in part because it establishes state-of-the-art (SOTA) records and could potentially replace existing Deep Neural Networks (DNNs). Despite the remarkable…

Machine Learning · Computer Science 2022-08-23 Hongwu Peng , Shaoyi Huang , Shiyang Chen , Bingbing Li , Tong Geng , Ang Li , Weiwen Jiang , Wujie Wen , Jinbo Bi , Hang Liu , Caiwen Ding

Heuristic design upholds modern electronic design automation (EDA) tools, yet crafting effective placement, routing, and scheduling strategies entails substantial expertise. We study how large language models (LLMs) can systematically…

Hardware Architecture · Computer Science 2026-04-30 Shiva Ahir , Alex Doboli

High-level synthesis (HLS) has significantly advanced the automation of digital circuits design, yet the need for expertise and time in pragma tuning remains challenging. Existing solutions for the design space exploration (DSE) adopt…

Hardware Architecture · Computer Science 2025-04-14 Ping Chang , Tosiron Adegbija , Yuchao Liao , Claudio Talarico , Ao Li , Janet Roveda

Dataflow hardware designs enable efficient FPGA implementations via high-level synthesis (HLS), but correctly sizing first-in-first-out (FIFO) channel buffers remains challenging. FIFO sizes are user-defined and balance latency and…

Hardware Architecture · Computer Science 2025-10-27 Stefan Abi-Karam , Rishov Sarkar , Suhail Basalama , Jason Cong , Callie Hao

High-level synthesis (HLS) accelerates FPGA design by rapidly generating diverse implementations using optimization directives. However, even with cycle-accurate C/RTL co-simulation, the reported clock cycles often differ significantly from…

Hardware Architecture · Computer Science 2025-04-18 Jiho Kim , Cong Hao

Field-Programmable Gate Arrays (FPGAs) play an indispensable role in Electronic Design Automation (EDA), translating Register-Transfer Level (RTL) designs into gate-level netlists. The correctness and reliability of FPGA logic synthesis…

Software Engineering · Computer Science 2025-09-03 Hui Zeng , Zhihao Xu , Hui Li , Siwen Wang , Qian Ma

Even though it seems that FPGAs have finally made the transition from research labs to the consumer devices' market, programming them remains challenging. Despite the improvements made by High-Level Synthesis (HLS), which removed the…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-09-02 Roberto Rigamonti , Baptiste Delporte , Anthony Convers , Alberto Dassatti

Implementing image processing algorithms using FPGAs or ASICs can improve energy efficiency by orders of magnitude over optimized CPU, DSP, or GPU code. These efficiency improvements are crucial for enabling new applications on mobile…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-26 James Hegarty , Omar Eldash , Amr Suleiman , Armin Alaghi

The scale invariant feature transform (SIFT) algorithm is considered a classical feature extraction algorithm within the field of computer vision. SIFT keypoint descriptor matching is a computationally intensive process due to the amount of…

Computer Vision and Pattern Recognition · Computer Science 2020-12-18 Luka Daoud , Muhammad Kamran Latif , H S. Jacinto , Nader Rafla

Point-based 3D point cloud models employ computation and memory intensive mapping functions alongside NN layers for classification/segmentation, and are executed on server-grade GPUs. The sparse, and unstructured nature of 3D point cloud…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-30 Amur Saqib Pal , Muhammad Mohsin Ghaffar , Faisal Shafait , Christian Weis , Norbert Wehn

Large Language Models (LLMs) have become extremely potent instruments with exceptional capacities for comprehending and producing human-like text in a wide range of applications. However, the increasing size and complexity of LLMs present…

Machine Learning · Computer Science 2024-06-18 Yingbing Huang , Lily Jiaxin Wan , Hanchen Ye , Manvi Jha , Jinghua Wang , Yuhong Li , Xiaofan Zhang , Deming Chen

Artificial intelligence (AI) is increasingly deployed in real-time and energy-constrained environments, driving demand for hardware platforms that can deliver high performance and power efficiency. While central processing units (CPUs) and…

Hardware Architecture · Computer Science 2026-01-28 Aybars Yunusoglu , Talha Coskun , Hiruna Vishwamith , Murat Isik , I. Can Dikmen

Hyperdimensional Computing (HDC), a technique inspired by cognitive models of computation, has been proposed as an efficient and robust alternative basis for machine learning. HDC programs are often manually written in low-level and target…