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Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit (SQC) technology, synchronization…

In recent years, high speed and high resolution analog-to-digital converter (ADC) is widely employed in many physical experiments, especially in high precision time and charge measurement. The rapid increasing amount of digitized data…

Signal Processing · Electrical Eng. & Systems 2018-06-14 Guangyuan Yuan , Zhe cao , Shuwen Wang , Shubin Liu , Qi An

One of the many limitations with the mixed-signal design is physically testing circuit ideas. While it is easier to test digital circuits with FPGAs, this can not be done usually with mixed-signal circuits. Although some FPGAs have built-in…

Signal Processing · Electrical Eng. & Systems 2020-08-04 Luis E. Rueda G. , Edward Silva , Andres Centeno , Elkim Roa

Many application domains face the challenges of high-power consumption and high computational demands, especially with the advancement in embedded machine learning and edge computing. Designing application-specific circuits is crucial to…

Systems and Control · Electrical Eng. & Systems 2025-08-13 Zeinab Hijazi , Fatima Bzeih , Ali Ibrahim

The growing complexity of cyber-physical systems (CPSs) calls for early prototyping tools that combine accuracy, speed, and usability. Virtual Platforms (VPs) provide fast functional simulation, but hybrid co-emulation solutions, in which…

FPGA-based hardware accelerators have received increasing attention mainly due to their ability to accelerate deep pipelined applications, thus resulting in higher computational performance and energy efficiency. Nevertheless, the amount of…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-03-23 R. Nepomuceno , R. Sterle , G. Valarini , M. Pereira , H. Yviquel , G. Araujo

This paper presents a workflow for synthesizing near-optimal FPGA implementations for structured-mesh based stencil applications for explicit solvers. It leverages key characteristics of the application class, its computation-communication…

Hardware Architecture · Computer Science 2021-01-08 Kamalavasan Kamalakkannan , Gihan R. Mudalige , Istvan Z. Reguly , Suhaib A. Fahmy

Conventional analog-to-digital converters (ADCs) fail to capture high-dynamic-range (HDR) signals due to clipping. Modulo ADCs circumvent this limitation by folding the input prior to quantization and algorithmically reconstructing the…

Signal Processing · Electrical Eng. & Systems 2025-12-01 Zeyuan Li , Wenyi Yan , Lu Gan , Guoquan Li , Hongqing Liu

In this paper we present a novel high-resolution multi-channel FPGA-based time-to-digital converter (TDC). We designed and implemented a complex electronic circuit on the FPGA, whose overall accuracy is several orders of magnitude greater…

Hardware Architecture · Computer Science 2024-06-27 Balazs Jakli , Adam Rak , Gyorgy Cserey

Developing mixed-signal analog-digital neuromorphic circuits in advanced scaled processes poses significant design challenges. We present compact and energy efficient sub-threshold analog synapse and neuron circuits, optimized for a 28 nm…

Emerging Technologies · Computer Science 2019-08-22 Ning Qiao , Giacomo Indiveri

Hybrid memory systems, comprised of emerging non-volatile memory (NVM) and DRAM, have been proposed to address the growing memory demand of applications. Emerging NVM technologies, such as phase-change memories (PCM), memristor, and 3D…

Hardware Architecture · Computer Science 2024-03-19 Fei Wen , Mian Qin , Paul V. Gratz , A. L. Narasimha Reddy

This article presents an asynchronous FPGA architecture for implementing cryptographic algorithms secured against physical cryptanalysis. We discuss the suitability of asynchronous reconfigurable architectures for such applications before…

The current over-provisioned heterogeneous multi-cores require effective run-time optimization strategies, and the run-time power monitoring subsystem is paramount for their success. Several state-of-the-art methodologies address the design…

Hardware Architecture · Computer Science 2025-01-30 Andrea Galimberti , Michele Piccoli , Davide Zoni

Developing dedicated mixed-signal neuromorphic computing systems optimized for real-time sensory-processing in extreme edge-computing applications requires time-consuming design, fabrication, and deployment of full-custom neuromorphic…

Neural and Evolutionary Computing · Computer Science 2025-08-18 Fernando M. Quintana , Maryada , Pedro L. Galindo , Elisa Donati , Giacomo Indiveri , Fernando Perez-Peña

Quantum circuits utilizing real time feedback techniques (such as active reset and mid-circuit measurement) are a powerful tool for NISQ-era quantum computing. Such techniques are crucial for implementing error correction protocols, and can…

In the field of High Performance Computing, communications among processes represent a typical bottleneck for massively parallel scientific applications. Object of this research is the development of a network interface card with specific…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-09-07 Roberto Ammendola

A near memory hardware accelerator, based on a novel direct path computational model, for real-time emulation of radio frequency systems is demonstrated. Our evaluation of hardware performance uses both application-specific integrated…

Analog neuromorphic hardware promises fast brain emulation on the one hand and an efficient implementation of novel, brain-inspired computing paradigms on the other. Bridging this spectrum requires flexibly configurable circuits with…

Neural and Evolutionary Computing · Computer Science 2022-09-21 Sebastian Billaudelle , Johannes Weis , Philipp Dauer , Johannes Schemmel

Modern multicore systems are migrating from homogeneous systems to heterogeneous systems with accelerator-based computing in order to overcome the barriers of performance and power walls. In this trend, FPGA-based accelerators are becoming…

Hardware Architecture · Computer Science 2020-09-04 Zhe Lin , Sharad Sinha , Hao Liang , Liang Feng , Wei Zhang

Networks-on-Chips (NoCs) recently became widely used, from multi-core CPUs to edge-AI accelerators. Emulation on FPGAs promises to accelerate their RTL modeling compared to slow simulations. However, realistic test stimuli are challenging…

Hardware Architecture · Computer Science 2022-06-24 Yee Yang Tan , Felix Staudigl , Lukas Jünger , Anna Drewes , Rainer Leupers , Jan Moritz Joseph
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