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Related papers: Reactive Synthesis with Maximum Realizability of L…

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Reactive synthesis is concerned with finding a correct-by-construction controller from formal specifications, typically expressed in Linear Temporal Logic (LTL). The specifications describe assumptions about an environment and guarantees to…

Logic in Computer Science · Computer Science 2019-10-15 Davide G. Cavezza , Dalal Alrajeh , Andras Gyorgy

Recent years have seen an increasing use of Signal Temporal Logic (STL) as a formal specification language for symbolic control, due to its expressiveness and closeness to natural language. Furthermore, STL specifications can be encoded as…

Systems and Control · Electrical Eng. & Systems 2020-06-11 Yann Gilpin , Vince Kurtz , Hai Lin

Deep Reinforcement Learning (DRL) has the potential to be used for synthesizing feedback controllers (agents) for various complex systems with unknown dynamics. These systems are expected to satisfy diverse safety and liveness properties…

Artificial Intelligence · Computer Science 2022-12-05 Nikhil Kumar Singh , Indranil Saha

Temporal logic has been widely used to express complex task specifications for cyber-physical systems (CPSs). One way to synthesize a controller for CPS under temporal logic constraints is to first abstract the CPS as a discrete transition…

Systems and Control · Electrical Eng. & Systems 2021-09-28 Luyao Niu , Andrew Clark

We present a reinforcement learning (RL) framework to synthesize a control policy from a given linear temporal logic (LTL) specification in an unknown stochastic environment that can be modeled as a Markov Decision Process (MDP).…

Robotics · Computer Science 2026-04-07 Alper Kamil Bozkurt , Yu Wang , Michael M. Zavlanos , Miroslav Pajic

Reactive synthesis is an automatic way to translate a human intention expressed in some logic into a system of some kind. This thesis has two parts, devoted to logic and to systems. In Part I, we develop two new approaches to CTL*…

Logic in Computer Science · Computer Science 2018-08-29 Ayrat Khalimov

This paper presents an algorithmic framework for control synthesis of continuous dynamical systems subject to signal temporal logic (STL) specifications. We propose a novel algorithm to obtain a time-partitioned finite automaton from an STL…

Systems and Control · Electrical Eng. & Systems 2022-10-05 Qi Heng Ho , Roland B. Ilyes , Zachary N. Sunberg , Morteza Lahijanian

Reactive synthesis addresses the problem of generating a controller for a temporal specification in an adversarial environment; it was typically studied for LTL. Driven by applications ranging from AI to business process management, LTL…

Logic in Computer Science · Computer Science 2025-08-26 Sarah Winkler

Given a Linear Temporal Logic (LTL) formula over input and output variables, reactive synthesis requires us to design a deterministic Mealy machine that gives the values of outputs at every time step for every sequence of inputs, such that…

Logic in Computer Science · Computer Science 2024-01-23 S. Akshay , Eliyahu Basa , Supratik Chakraborty , Dror Fried

We present the Temporal Logic Synthesis Format (TLSF), a high-level format to describe synthesis problems via Linear Temporal Logic (LTL). The format builds upon standard LTL, but additionally allows to use high level constructs, such as…

Logic in Computer Science · Computer Science 2016-01-21 Swen Jacobs , Felix Klein

This work addresses maximally robust control synthesis under unknown disturbances. We consider a general nonlinear system, subject to a Signal Temporal Logic (STL) specification, and wish to jointly synthesize the maximal possible…

Robotics · Computer Science 2024-04-09 Joris Verhagen , Lars Lindemann , Jana Tumova

We present the Temporal Logic Synthesis Format (TLSF), a high-level format to describe synthesis problems via Linear Temporal Logic (LTL). The format builds upon standard LTL, but additionally allows to use high-level constructs, such as…

Logic in Computer Science · Computer Science 2016-11-24 Swen Jacobs , Felix Klein , Sebastian Schirmer

Controller synthesis is a theoretical approach to the systematic design of discrete event systems. It constructs a controller to provide feedback and control to the system, ensuring it meets specified control specifications. Traditional…

Multiagent Systems · Computer Science 2025-09-03 Ruohan Huang , Zining Cao

Linear Temporal Logic (LTL) is a widely used task specification language for autonomous systems. To mitigate the significant manual effort and expertise required to define LTL-encoded tasks, several methods have been proposed for…

Computation and Language · Computer Science 2026-02-23 David Smith Sundarsingh , Jun Wang , Jyotirmoy V. Deshmukh , Yiannis Kantaros

We present an analysis technique for temporal specifications of reactive systems that identifies, on the level of individual system outputs over time, which parts of the implementation are determined by the specification, and which parts…

Formal Languages and Automata Theory · Computer Science 2018-03-28 Bernd Finkbeiner , Hazem Torfah

This paper proposes a specification-guided framework for control of nonlinear systems with linear temporal logic (LTL) specifications. In contrast with well-known abstraction-based methods, the proposed framework directly characterizes the…

Systems and Control · Electrical Eng. & Systems 2022-05-03 Yinan Li , Zhibing Sun , Jun Liu

Control synthesis from temporal logic specifications has gained popularity in recent years. In this paper, we use a model predictive approach to control discrete time linear systems with additive bounded disturbances subject to constraints…

Systems and Control · Computer Science 2016-05-24 Sadra Sadraddini , Calin Belta

Individual machines in flexible production lines explicitly expose capabilities at their interfaces by means of parametric skills. Given such a set of configurable machines, a line integrator is faced with the problem of finding and tuning…

Formal Languages and Automata Theory · Computer Science 2016-05-23 Chih-Hong Cheng , Lacramioara Astefanoaei , Harald Ruess , Souha Ben Rayana , Saddek Bensalem

G4LTL-ST automatically synthesizes control code for industrial Programmable Logic Controls (PLC) from timed behavioral specifications of input-output signals. These specifications are expressed in a linear temporal logic (LTL) extended with…

Logic in Computer Science · Computer Science 2014-05-16 Chih-Hong Cheng , Chung-Hao Huang , Harald Ruess , Stefan Stattelmann

Reinforcement Learning (RL) has emerged as an efficient method of choice for solving complex sequential decision making problems in automatic control, computer science, economics, and biology. In this paper we present a model-free RL…

Logic in Computer Science · Computer Science 2019-09-13 Mohammadhosein Hasanbeig , Yiannis Kantaros , Alessandro Abate , Daniel Kroening , George J. Pappas , Insup Lee