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Coarse-Grained Reconfigurable Arrays (CGRA) are promising edge accelerators due to the outstanding balance in flexibility, performance, and energy efficiency. Classic CGRAs statically map compute operations onto the processing elements (PE)…

Hardware Architecture · Computer Science 2023-09-20 Dan Wu , Peng Chen , Thilini Kaushalya Bandara , Zhaoying Li , Tulika Mitra

Neural architectures and hardware accelerators have been two driving forces for the progress in deep learning. Previous works typically attempt to optimize hardware given a fixed model architecture or model architecture given fixed…

FPGAs are increasingly gaining traction in cloud and edge computing environments due to their hardware flexibility, low latency, and low energy consumption. However, the existing hardware stack of FPGA and the host-FPGA connectivity does…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-04 Masudul Hassan Quraishi , Michael Riera , Fengbo Ren , Aman Arora , Aviral Shrivastava

Though CNNs are highly parallel workloads, in the absence of efficient on-chip memory reuse techniques, an accelerator for them quickly becomes memory bound. In this paper, we propose a CNN accelerator design for inference that is able to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-26 Kingshuk Majumder , Shubham Nema , Uday Bondhugula

Intensive computation is entering data centers with multiple workloads of deep learning. To balance the compute efficiency, performance, and total cost of ownership (TCO), the use of a field-programmable gate array (FPGA) with…

Computer Vision and Pattern Recognition · Computer Science 2019-09-19 Xiaoyu Yu , Yuwei Wang , Jie Miao , Ephrem Wu , Heng Zhang , Yu Meng , Bo Zhang , Biao Min , Dewei Chen , Jianlin Gao

With CPU scaling slowing down in today's data centers, more functionalities are being offloaded from the CPU to auxiliary devices. One such device is the SmartNIC, which is being increasingly adopted in data centers. In today's cloud…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-12-26 Yizhou Shan , Will Lin , Ryan Kosta , Arvind Krishnamurthy , Yiying Zhang

This paper argues for an accelerator development toolchain that takes into account the whole system containing the accelerator. With whole-system visibility, the toolchain can better assist accelerator scoping and composition in the context…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-04-06 André DeHon , Hans Giesen , Nik Sultana , Yuanlong Xiao

FPGA is appropriate for fix-point neural networks computing due to high power efficiency and configurability. However, its design must be intensively refined to achieve high performance using limited hardware resources. We present an…

Hardware Architecture · Computer Science 2022-01-03 Qingyang Yi , Heming Sun , Masahiro Fujita

The exponential growth in smart sensors and rapid progress in 5G networks is creating a world awash with data streams. However, a key barrier to building performant multi-sensor, distributed stream processing applications is high…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-11-10 Giuseppe Coviello , Kunal Rao , Murugan Sankaradas , Srimat Chakradhar

Recent advances in graph processing on FPGAs promise to alleviate performance bottlenecks with irregular memory access patterns. Such bottlenecks challenge performance for a growing number of important application areas like machine…

Hardware Architecture · Computer Science 2022-06-20 Jonas Dann , Daniel Ritter , Holger Fröning

The continuous growth of big data applications with high computational and scalability demands has resulted in increasing popularity of cloud computing. Optimizing the performance and power consumption of cloud resources is therefore…

Hardware Architecture · Computer Science 2019-10-30 Sahand Salamat , Behnam Khaleghi , Mohsen Imani , Tajana Rosing

High level programming languages and GPU accelerators are powerful enablers for a wide range of applications. Achieving scalable vertical (within a compute node), horizontal (across compute nodes), and temporal (over different generations…

In the face of escalating complexity and size of contemporary FPGAs and circuits, routing emerges as a pivotal and time-intensive phase in FPGA compilation flows. In response to this challenge, we present an open-source parallel routing…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-07-02 Xinshi Zang , Wenhao Lin , Shiju Lin , Jinwei Liu , Evangeline F. Y. Young

With their widespread availability, FPGA-based accelerators cards have become an alternative to GPUs and CPUs to accelerate computing in applications with certain requirements (like energy efficiency) or properties (like fixed-point…

Hardware Architecture · Computer Science 2022-10-20 Tom Vander Aa , Tom Haber , Thomas J. Ashby , Roel Wuyts , Wilfried Verachtert

Sparse triangular solve (SpTRSV) is widely used in various domains. Numerous studies have been conducted using CPUs, GPUs, and specific hardware accelerators, where dataflows can be categorized into coarse and fine granularity. Coarse…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-19 Qian Chen , Xiaofeng Yang , Shengli Lu

Multi-accelerator servers are increasingly being deployed in shared multi-tenant environments (such as in cloud data centers) in order to meet the demands of large-scale compute-intensive workloads. In addition, these accelerators are…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-08 Kiran Ranganath , Joshua D. Suetterlein , Joseph B. Manzano , Shuaiwen Leon Song , Daniel Wong

Subgraph matching is a basic operation widely used in many applications. However, due to its NP-hardness and the explosive growth of graph data, it is challenging to compute subgraph matching, especially in large graphs. In this paper, we…

Databases · Computer Science 2021-02-25 Xin Jin , Zhengyi Yang , Xuemin Lin , Shiyu Yang , Lu Qin , You Peng

Recently, 3D Gaussian Splatting (3DGS) has emerged as a mainstream rendering technique due to its photorealistic quality and low latency. However, processing massive numbers of non-contributing Gaussian points introduces significant…

Hardware Architecture · Computer Science 2026-03-03 Wenhui Ou , Zhuoyu Wu , Yipu Zhang , Dongjun Wu , Freddy Ziyang Hong , Chik Patrick Yue

Modern real-time business analytic consist of heterogeneous workloads (e.g, database queries, graph processing, and machine learning). These analytic applications need programming environments that can capture all aspects of the constituent…

Hardware Architecture · Computer Science 2019-05-27 Rekha Singhal , Nathan Zhang , Luigi Nardi , Muhammad Shahbaz , Kunle Olukotun

FPGAs have shown great potential in providing low-latency and energy-efficient solutions for deep neural network (DNN) inference applications. Currently, the majority of FPGA-based DNN accelerators in the cloud run in a time-division…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-30 Shulin Zeng , Guohao Dai , Hanbo Sun , Kai Zhong , Guangjun Ge , Kaiyuan Guo , Yu Wang , Huazhong Yang