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An integer adder for integers in the binary representation is one of the basic operations of any digital processor. For adding two integers of N bits each, the serial adder takes as many clock ticks. For achieving higher speeds, parallel…

Hardware Architecture · Computer Science 2019-03-26 Duggirala Meher Krishna , Duggirala Ravi

Approximate computing has in recent times found significant applications towards lowering power, area, and time requirements for arithmetic operations. Several works done in recent years have furthered approximate computing along these…

Hardware Architecture · Computer Science 2020-09-01 Rajat Bhattacharjya , Vishesh Mishra , Saurabh Singh , Kaustav Goswami , Dip Sankar Banerjee

We present a novel fast bipartitioned hybrid adder (FBHA) that utilizes carry-select and carry-lookahead logic. The proposed FBHA is an accurate adder with a significant part and a less significant part joined together by a carry signal. In…

Hardware Architecture · Computer Science 2024-12-03 Padmanabhan Balasubramanian , Douglas L. Maskell

The BCD (Binary Coded Decimal) being the more accurate and human-readable representation with ease of conversion, is prevailing in the computing and electronic communication.In this paper, a tree-structured parallel BCD addition algorithm…

Hardware Architecture · Computer Science 2022-03-21 Zarrin Tasnim Sworna , Mubin Ul Haque , Hafiz Md. Hasan Babu , Lafifa Jamal

We consider the problem of constructing fast and small parallel prefix adders for non-uniform input arrival times. This problem arises whenever the adder is embedded into a more complex circuit, e. g. a multiplier. Most previous results are…

Hardware Architecture · Computer Science 2014-11-12 Stephan Held , Sophie Spirkl

In this paper, an improved GEF fast addition algorithm is proposed. The proposed algorithm reduces time and memory space. In this algorithm, carry is calculated on the basis of arrival timing of the operand's bits without overhead of…

Data Structures and Algorithms · Computer Science 2013-04-09 Md. Mizanur Rahman , Md. Shahadat Hossain , Md. Rakib Hasan , M. M. A. Hashem

In this work, we present a class of new designs for reversible binary and BCD adder circuits. The proposed designs are primarily optimized for the number of ancilla inputs and the number of garbage outputs and are designed for possible best…

Quantum Physics · Physics 2017-12-08 Himanshu Thapliyal , Nagarajan Ranganathan

This paper presents the Hybrid Overestimating Approximate Adder designed to enhance the performance in processing engines, specifically focused on edge AI applications. A novel Plus One Adder design is proposed as an incremental adder in…

Hardware Architecture · Computer Science 2025-01-13 Omkar Kokane , Prabhat Sati , Mukul Lokhande , Santosh Kumar Vishvakarma

Multi-digit addition is a clear probe of the computational power of large language models. To dissect the internal arithmetic processes in LLaMA-3-8B-Instruct, we combine linear probing with logit-lens inspection. Inspired by the…

Artificial Intelligence · Computer Science 2025-09-10 Yao Yan

Bit addition arises virtually everywhere in digital circuits: arithmetic operations, increment/decrement operators, computing addresses and table indices, and so on. Since bit addition is such a basic task in Boolean circuit synthesis, a…

Computational Complexity · Computer Science 2025-09-25 Mikhail Goncharov , Alexander S. Kulikov , Georgie Levtsov

We present an efficient addition circuit, borrowing techniques from the classical carry-lookahead arithmetic circuit. Our quantum carry-lookahead (QCLA) adder accepts two n-bit numbers and adds them in O(log n) depth using O(n) ancillary…

Quantum Physics · Physics 2013-04-03 Thomas G. Draper , Samuel A. Kutin , Eric M. Rains , Krysta M. Svore

The quantum and reversible paradigm merges the principles of quantum mechanics and reversible computation to enable information-preserving processing. It supports next-generation computing architectures that provide improved scalability and…

Quantum Physics · Physics 2025-12-15 Negin Mashayekhi , Mohammad Reza Reshadinezhad , Antonio Rubio , Shekoofeh Moghimi

A new asynchronous early output block carry lookahead adder (BCLA) incorporating redundant carries is proposed. Compared to the best of existing semi-custom asynchronous carry lookahead adders (CLAs) employing delay-insensitive data…

Hardware Architecture · Computer Science 2019-01-29 P Balasubramanian , D L Maskell , N E Mastorakis

Optimization techniques for decreasing the time and area of adder circuits have been extensively studied for years mostly in binary logic system. In this paper, we provide the necessary equations required to design a full adder in…

Hardware Architecture · Computer Science 2010-09-15 Anindya Das , Ifat Jahangir , Masud Hasan

We introduce a truncated addition operation on pairs of N-bit binary numbers that interpolates between ordinary addition mod 2^N and bitwise addition in (Z/2Z)^N. We use truncated addition to analyze hash functions that are built from the…

Discrete Mathematics · Computer Science 2013-03-20 Rebecca E. Field , Brant C. Jones

We set new speed records for multiplying long polynomials over finite fields of characteristic two. Our multiplication algorithm is based on an additive FFT (Fast Fourier Transform) by Lin, Chung, and Huang in 2014 comparing to previously…

Symbolic Computation · Computer Science 2018-01-08 Ming-Shing Chen , Chen-Mou Cheng , Po-Chun Kuo , Wen-Ding Li , Bo-Yin Yang

In this paper, we propose an efficient quantum carry-lookahead adder based on the higher radix structure. For the addition of two $n$-bit numbers, our adder uses $O(n)-O(\frac{n}{r})$ qubits and $O(n)+O(\frac{n}{r})$ T gates to get the…

Quantum Physics · Physics 2023-04-10 Siyi Wang , Anubhab Baksi , Anupam Chattopadhyay

We consider the fundamental problem of constructing fast circuits for the carry bit computation in binary addition. Up to a small additive constant, the carry bit computation reduces to computing an \aop, i.e., a formula of type $t_0 \land…

Data Structures and Algorithms · Computer Science 2019-10-28 Ulrich Brenner , Anna Hermann

The paper presents a systematic study and implementation of a reconfigurable combinatorial multi-operand adder for use in Deep Learning systems. The size of carry changes with the number of operands and hence a reliable algorithm to…

Hardware Architecture · Computer Science 2020-08-10 Shilpa Mayannavar , Uday Wali

Binary embedding is a nonlinear dimension reduction methodology where high dimensional data are embedded into the Hamming cube while preserving the structure of the original space. Specifically, for an arbitrary $N$ distinct points in…

Data Structures and Algorithms · Computer Science 2019-01-24 Xinyang Yi , Constantine Caramanis , Eric Price
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