Related papers: Characterising Quantum Devices at Scale with Custo…
Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current Noisy Intermediate-Scale Quantum (NISQ) technology, each quantum device is controlled and characterised though a dedicated…
Research in the field of low-temperature electronics is limited by the small number of electrical contacts available on cryogenic set ups. This not only restricts the number of devices that can be fabricated, but also the device and circuit…
Large-scale cryogenic quantum systems are constrained by an input-output bottleneck between room-temperature electronics and millikelvin stages, particularly in superconducting qubit platforms. This bottleneck is most acute for output…
In this paper, we present a reconfigurable multiplex (MUX) setup that increases the throughput of electrical characterisation at cryogenic temperature. The setup separates the MUX circuitry from quantum device under test (qDUT), allowing…
Semiconductor integrated circuits operated at cryogenic temperature will play an essential role in quantum computing architectures. These can offer equivalent or superior performance to their room-temperature counterparts while enabling a…
We present a multiplexing scheme for the measurement of large numbers of mesoscopic devices in cryogenic systems. The multiplexer is used to contact an array of 256 split gates on a GaAs/AlGaAs heterostructure, in which each split gate can…
Large-scale superconducting quantum computing systems entail high-fidelity control and readout of large numbers of qubits at millikelvin temperatures, resulting in a massive input-output bottleneck. Cryo-electronics, based on complementary…
Cryogenic CMOS technology (cryo-CMOS) offers a scalable solution for quantum device interface fabrication. Several previous works have studied the characterization of CMOS technology at cryogenic temperatures for various process nodes.…
Continuing advancements in quantum information processing have caused a paradigm shift from research mainly focused on testing the reality of quantum mechanics to engineering qubit devices with numbers required for practical quantum…
Scalable spin-based quantum computing demands precise and stable control of a large number of gate-defined quantum dots while minimizing wiring complexity and thermal load. Control architectures based on sample-and-hold (SH) multiplexing…
A scaled-up quantum computer will require a highly efficient control interface that autonomously manipulates and reads out large numbers of qubits, which for solid-state implementations are usually held at millikelvin (mK) temperatures.…
Large arrays of cryogenic detectors, including transition-edge sensors (TESs) or magnetic micro-calorimeters (MMCs), are needed for future experiments across a wide range of applications. Complexities in integration and cryogenic wiring…
Owing to the maturity of complementary metal oxide semiconductor (CMOS) microelectronics, qubits realized with spins in silicon quantum dots (QDs) are considered among the most promising technologies for building scalable quantum computers.…
Superconducting quantum computers have emerged as a leading platform for next-generation computing, offering exceptional scalability and unprecedented computational speeds. However, scaling these systems to millions of qubits for practical…
Large-scale cryogenic Input-Output (IO) infrastructure is a requirement for realising fault-tolerant quantum computing in solid-state modalities. Such IO scaling presents significant challenges in thermal modelling, hardware design and…
Scaling superconducting quantum computers to the fault-tolerant regime calls for a commensurate scaling of the classical control and readout stack. Today's systems largely rely on room-temperature, rack-based instrumentation connected to…
Measurement of multiple quantum devices on a single chip increases characterization throughput and enables testing of device repeatability, process yield, and systematic variations in device design. We present a method that uses on-chip…
Cryogenic characterization and modeling of 0.18um CMOS technology (1.8V and 5V) are presented in this paper. Several PMOS and NMOS transistors with different width to length ratios(W/L) were extensively characterized under various bias…
The challenges of operating qubits in a cryogenic environment point to a looming bottleneck for large-scale quantum processors, limited by the number of input-output connections. Classical processors solve this problem via multiplexing;…
Accurate on-chip temperature sensing is critical for the optimal performance of modern CMOS integrated circuits (ICs), to understand and monitor localized heating around the chip during operation. The development of quantum computers has…