Related papers: Timing and resource-aware mapping of quantum circu…
As the effort to scale up existing quantum hardware proceeds, it becomes necessary to schedule quantum gates in a way that minimizes the number of operations. There are three constraints that have to be satisfied: the order or dependency of…
In Layout Synthesis, the logical qubits of a quantum circuit are mapped to the physical qubits of a given quantum hardware platform, taking into account the connectivity of physical qubits. This involves inserting SWAP gates before an…
Quantum computing promises to revolutionize various fields, yet the execution of quantum programs necessitates an effective compilation process. This involves strategically mapping quantum circuits onto the physical qubits of a quantum…
To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical…
Quantum computing devices in the NISQ era share common features and challenges like limited connectivity between qubits. Since two-qubit gates are allowed on limited qubit pairs, quantum compilers must transform original quantum programs to…
Quantum computing promises breakthroughs in simulating and solving complex, classically intractable problems. However, current noisy intermediate-scale quantum (NISQ) devices are relatively small and error-prone, prohibiting large-scale…
One of the outstanding challenges in contemporary science and technology is building a quantum computer that is useful in applications. By starting from an estimate of the algorithm success rate, we can explicitly connect gate fidelity to…
Qubit Mapping is a critical aspect of implementing quantum circuits on real hardware devices. Currently, the existing algorithms for qubit mapping encounter difficulties when dealing with larger circuit sizes involving hundreds of qubits.…
A limited number of qubits, high error rates, and limited qubit connectivity are major challenges for effective near-term quantum computations. Quantum circuit partitioning divides a quantum computation into a set of computations that…
As quantum hardware increases in complexity, successful algorithmic execution relies more heavily on awareness of existing device constraints. In this work we focus on the problem of routing quantum information across the machine to…
Designing efficient quantum processor topologies is pivotal for advancing scalable quantum computing architectures. The communication overhead, a critical factor affecting the execution fidelity of quantum circuits, arises from inevitable…
Quantum computers in practice today require strict memory constraints, where 2-qubit operations can only be performed between the qubits closest to each other in a graph structure. So a quantum circuit must undergo a transformation to the…
Compiling a high-level quantum circuit down to a low-level description that can be executed on state-of-the-art quantum computers is a crucial part of the software stack for quantum computing. One step in compiling a quantum circuit to some…
Communication and topology aware process mapping is a powerful approach to reduce communication time in parallel applications with known communication patterns on large, distributed memory systems. We address the problem as a quadratic…
Facilitating the ability to achieve logical qubit error rates below physical qubit error rates, error correction is anticipated to play an important role in scaling quantum computers. While many algorithms require millions of physical…
Quantum algorithms on near-term quantum processors are typically executed using shallow quantum circuits composed of one- and two-qubit gates. However, as circuit depth and gate number increase, gate imperfections and qubit decoherence…
Quantum algorithms rely on quantum computers for implementation, but the physical connectivity constraints of modern quantum processors impede the efficient realization of quantum algorithms. Qubit mapping, a critical technology for…
As we enter the era of useful quantum computers we need to better understand the limitations of classical support hardware, and develop mitigation techniques to ensure effective qubit utilisation. In this paper we discuss three key…
Quantum circuit optimization is essential for improving the performance of quantum algorithms, particularly on Noisy Intermediate-Scale Quantum (NISQ) devices with limited qubit connectivity and high error rates. Pattern matching has proven…
Quantum computers with a limited qubit connectivity require inserting SWAP gates for qubit routing, which increases gate execution errors and the impact of environmental noise due to an overhead in circuit depth. In this work, we benchmark…