English
Related papers

Related papers: PERI: A Posit Enabled RISC-V Core

200 papers

The new open and royalty-free RISC-V ISA is attracting interest across the whole computing continuum, from microcontrollers to supercomputers. High-performance RISC-V processors and accelerators have been announced, but RISC-V-based HPC…

The Internet of Things (IoT) is an ongoing technological revolution. Embedded processors are the processing engines of smart IoT devices. For decades, these processors were mainly based on the Arm instruction set architecture (ISA). In…

Cryptography and Security · Computer Science 2021-07-12 Tao Lu

The slowdown of Moore's law and the power wall necessitates a shift towards finely tunable precision (a.k.a. transprecision) computing to reduce energy footprint. Hence, we need circuits capable of performing floating-point operations on a…

Hardware Architecture · Computer Science 2020-07-06 Stefan Mach , Fabian Schuiki , Florian Zaruba , Luca Benini

Open-source RISC-V cores are increasingly demanded in domains like automotive and space, where achieving high instructions per cycle (IPC) through superscalar and out-of-order (OoO) execution is crucial. However, high-performance…

Hardware Architecture · Computer Science 2025-06-02 Zexin Fu , Riccardo Tedeschi , Gianmarco Ottavi , Nils Wistoff , César Fuguet , Davide Rossi , Luca Benini

Processor design and verification require a synergistic approach that combines instruction-level functional simulations with precise hardware emulations. The trade-off between speed and accuracy in the instruction set simulation poses a…

Hardware Architecture · Computer Science 2025-04-08 Kun Qin , Xiaorang Guo , Martin Schulz , Carsten Trinitis

Speculative attacks are still an active threat today that, even if initially focused on the x86 platform, reach across all modern hardware architectures. RISC-V is a newly proposed open instruction set architecture that has seen traction…

Cryptography and Security · Computer Science 2023-11-08 Ruxandra Bălucea , Paul Irofti

Integrating cryptographic accelerators into modern CPU architectures presents unique microarchitectural challenges, particularly when extending instruction sets with complex and multistage operations. Hardware-assisted cryptographic…

Hardware Architecture · Computer Science 2025-08-29 Alperen Bolat , Sakir Sezer , Kieran McLaughlin , Henry Hui

The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era in microprocessor architectures. Starting with low-power, low-performance prototypes, the RISC-V community has a good chance of moving…

Performance · Computer Science 2023-09-06 Valentin Volokitin , Evgeny Kozinov , Valentina Kustikova , Alexey Liniov , Iosif Meyerov

Spectral analysis plays an important role in detection of damage in structures and deep learning. The choice of a floating-point format plays a crucial role in determining the accuracy and performance of spectral analysis. The IEEE Std…

Hardware Architecture · Computer Science 2024-06-11 Sameer Deshmukh , Daniel Khankin , William Killian , John Gustafson , Elad Raz

The current challenges in technology scaling are pushing the semiconductor industry towards hardware specialization, creating a proliferation of heterogeneous systems-on-chip, delivering orders of magnitude performance and power benefits…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-02-28 Fares Elsabbagh , Blaise Tine , Priyadarshini Roshan , Ethan Lyons , Euna Kim , Da Eun Shim , Lingjun Zhu , Sung Kyu Lim , Hyesoon kim

Energy efficiency has become an increasingly important concern in computer architecture due to the end of Dennard scaling. Heterogeneity has been explored as a way to achieve better energy efficiency and heterogeneous microarchitecture…

Hardware Architecture · Computer Science 2018-11-21 Katie Lim , Jonathan Balkind , David Wentzlaff

The rapid growth of AI-based Internet-of-Things applications increased the demand for high-performance edge processing engines on a low-power budget and tight area constraints. As a consequence, vector processor architectures, traditionally…

RISC-V processors encounter substantial challenges in deploying multi-precision deep neural networks (DNNs) due to their restricted precision support, constrained throughput, and suboptimal dataflow design. To tackle these challenges, a…

Hardware Architecture · Computer Science 2024-07-16 Chuanning Wang , Chao Fang , Xiao Wu , Zhongfeng Wang , Jun Lin

The pace of RISC-V adoption continues to grow rapidly, yet for the successes enjoyed in areas such as embedded computing, RISC-V is yet to gain ubiquity in High Performance Computing (HPC). The Sophon SG2044 is SOPHGO's next generation…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-20 Nick Brown

The RISC-V "V" extension introduces vector processing to the RISC-V architecture. Unlike most SIMD extensions, it supports long vectors which can result in significant improvement of multiple applications. In this paper, we present our…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-10 Sonia Rani Gupta , Nikela Papadopoulou , Miquel Pericàs

In the context of the Horizon Europe project, METASAT, a hardware platform was developed as a prototype of future space systems. The platform is based on a multiprocessor NOEL-V, an established space-grade processor, which is integrated…

Hardware Architecture · Computer Science 2025-03-03 Marc Solé i Bonet , Jannis Wolf , Leonidas Kosmidis

The limited energy available in most embedded systems poses a significant challenge in enhancing the performance of embedded processors and microcontrollers. One promising approach to address this challenge is the use of approximate…

Hardware Architecture · Computer Science 2024-10-10 Arvin Delavari , Faraz Ghoreishy , Hadi Shahriar Shahhoseini , Sattar Mirzakuchaki

Open-source RISC-V cores are increasingly adopted in high-end embedded domains such as automotive, where maximizing instructions per cycle (IPC) is becoming critical. Building on the industry-supported open-source CVA6 core and its…

This paper introduces a novel 32-bit microprocessor, based on the RISC-V instruction set architecture, is designed,utilising a dynamic clock source to achieve high efficiency, overcoming the limitations of hardware delays. In addition, the…

Hardware Architecture · Computer Science 2022-11-29 Keyu Chen , Xuyi Hu , Robert Killey

The proliferation of edge devices necessitates efficient computational architectures for lightweight tasks, particularly deep neural network (DNN) inference. Traditional NPUs, though effective for such operations, face challenges in power,…

Hardware Architecture · Computer Science 2024-07-04 Won Hyeok Kim , Hyeong Jin Kim , Tae Hee Han