This paper introduces a novel 32-bit microprocessor, based on the RISC-V instruction set architecture, is designed,utilising a dynamic clock source to achieve high efficiency, overcoming the limitations of hardware delays. In addition, the microprocessor is also aimed to operate with both base (32-bit) instructions and 16-bit compressed instructions. The testing of the design is carried out using ModelSim with an ideal result.
@article{arxiv.2211.04455,
title = {Microprocessor Design with Dynamic Clock Source and Multi-Width Instructions},
author = {Keyu Chen and Xuyi Hu and Robert Killey},
journal= {arXiv preprint arXiv:2211.04455},
year = {2022}
}