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Parallel computing can offer an enormous advantage regarding the performance for very large applications in almost any field: scientific computing, computer vision, databases, data mining, and economics. GPUs are high performance many-core…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-11-24 Bogdan Oancea , Tudorel Andrei , Raluca Mariana Dragoescu

The combination of Winograd's algorithm and systolic array architecture has demonstrated the capability of improving DSP efficiency in accelerating convolutional neural networks (CNNs) on FPGA platforms. However, handling arbitrary…

Hardware Architecture · Computer Science 2021-07-12 Xinheng Liu , Yao Chen , Cong Hao , Ashutosh Dhar , Deming Chen

Recent developments in High Level Synthesis tools have attracted software programmers to accelerate their high-performance computing applications on FPGAs. Even though it has been shown that FPGAs can compete with GPUs in terms of…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-16 Hamid Reza Zohouri , Artur Podobas , Satoshi Matsuoka

We present a GPU-accelerated version of the real-space SPARC electronic structure code for performing Kohn-Sham density functional theory calculations within the local density and generalized gradient approximations. In particular, we…

Computational Physics · Physics 2023-06-14 Abhiraj Sharma , Alfredo Metere , Phanish Suryanarayana , Lucas Erlandson , Edmond Chow , John E. Pask

In this work we propose a highly optimized version of a simulated annealing (SA) algorithm adapted to the more recently developed Graphic Processor Units (GPUs). The programming has been carried out with CUDA toolkit, specially designed for…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-08-02 A. M. Ferreiro , J. A. García , J. G. López-Salas , C. Vázquez

Systolic arrays and shared-L1-memory manycore clusters are commonly used architectural paradigms that offer different trade-offs to accelerate parallel workloads. While the first excel with regular dataflow at the cost of rigid…

Hardware Architecture · Computer Science 2024-04-25 Sergio Mazzola , Samuel Riedel , Luca Benini

Systolic arrays are a promising computing concept which is in particular inline with CMOS technology trends and linear algebra operations found in the processing of artificial neural networks. The recent success of such deep learning…

Hardware Architecture · Computer Science 2020-06-26 Kevin Stehle , Günther Schindler , Holger Fröning

Modern Graphics Processing Units (GPUs) are well provisioned to support the concurrent execution of thousands of threads. Unfortunately, different bottlenecks during execution and heterogeneous application requirements create imbalances in…

This work presents a GPU thread mapping approach that allows doing fast parallel stencil-like computations on discrete fractals using their compact representation. The intuition behind is to employ two GPU tensor-core accelerated thread…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-10-26 Felipe A. Quezada , Cristóbal A. Navarro

We propose an optimization approach for determining both hardware and software parameters for the efficient implementation of a (family of) applications called dense stencil computations on programmable GPGPUs. We first introduce a simple,…

Hardware Architecture · Computer Science 2017-12-26 Nirmal Prajapati , Sanjay Rajopadhye , Hristo Djidjev , Nandkishore Santhi , Tobias Grosser , Rumen Andonov

Graph neural networks (GNNs) process large-scale graphs consisting of a hundred billion edges. In contrast to traditional deep learning, unique behaviors of the emerging GNNs are engaged with a large set of graphs and embedding data on…

Hardware Architecture · Computer Science 2022-01-25 Miryeong Kwon , Donghyun Gouk , Sangwon Lee , Myoungsoo Jung

We focus on implementing and optimizing a sixth-order finite-difference solver for simulating compressible fluids on a GPU using third-order Runge-Kutta integration. Since graphics processing units perform well in data-parallel tasks, this…

Computational Physics · Physics 2017-07-28 Johannes Pekkilä , Miikka S. Väisälä , Maarit J. Käpylä , Petri J. Käpylä , Omer Anjum

Modern general-purpose accelerators integrate a large number of programmable area- and energy-efficient processing elements (PEs), to deliver high performance while meeting stringent power delivery and thermal dissipation constraints. In…

Hardware Architecture · Computer Science 2025-11-11 Luca Colagrande , Jayanth Jonnalagadda , Luca Benini

Structured Cartesian grids are a fundamental component in numerical simulations. Although these grids facilitate straightforward discretization schemes, their na\"{i}ve use in sparse domains leads to excessive memory overhead and…

Computational Engineering, Finance, and Science · Computer Science 2025-12-15 Fan Gu , Xiangyu Hu

The popularity of neural networks (NNs) spans academia, industry, and popular culture. In particular, convolutional neural networks (CNNs) have been applied to many image based machine learning tasks and have yielded strong results. The…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-09-14 Matthew Moskewicz , Forrest Iandola , Kurt Keutzer

High Performance Computing (HPC) platforms allow scientists to model computationally intensive algorithms. HPC clusters increasingly use General-Purpose Graphics Processing Units (GPGPUs) as accelerators; FPGAs provide an attractive…

Hardware Architecture · Computer Science 2015-04-20 Syed Waqar Nabi , Saji N. Hameed , Wim Vanderbauwhede

We propose a generic algorithmic building block to accelerate training of machine learning models on heterogeneous compute systems. Our scheme allows to efficiently employ compute accelerators such as GPUs and FPGAs for the training of…

Machine Learning · Computer Science 2017-11-08 Celestine Dünner , Thomas Parnell , Martin Jaggi

Modern deep neural networks increasingly make use of features such as dynamic control flow, data structures and dynamic tensor shapes. Existing deep learning systems focus on optimizing and executing static neural networks which assume a…

Programming Languages · Computer Science 2021-03-15 Haichen Shen , Jared Roesch , Zhi Chen , Wei Chen , Yong Wu , Mu Li , Vin Sharma , Zachary Tatlock , Yida Wang

Convolutional Neural Networks (CNNs) are widely used in deep learning applications, e.g. visual systems, robotics etc. However, existing software solutions are not efficient. Therefore, many hardware accelerators have been proposed…

Machine Learning · Computer Science 2021-09-08 Sasindu Wijeratne , Sandaruwan Jayaweera , Mahesh Dananjaya , Ajith Pasqual

Reconfigurable computing offers a good balance between flexibility and energy efficiency. When combined with software-programmable devices such as CPUs, it is possible to obtain higher performance by spatially distributing the…

Hardware Architecture · Computer Science 2024-04-22 Daniel Vazquez , Jose Miranda , Alfonso Rodriguez , Andres Otero , Pascuale Davide Schiavone , David Atienza
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