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Independent Component Analysis (ICA) is a dimensionality reduction technique that can boost efficiency of machine learning models that deal with probability density functions, e.g. Bayesian neural networks. Algorithms that implement…
Security-constrained unit commitment (SCUC) is solved for power system day-ahead generation scheduling, which is a large-scale mixed-integer linear programming problem and is very computationally intensive. Model reduction of SCUC may bring…
This thesis develops signal-processing algorithms and implementation schemes under constraints of minimal parallelism and memory space, with the goal of improving energy efficiency of low-power computing hardware. We propose (i) a…
This paper describes the Light-Shift Laser-Lock (LSLL) technique, a novel method intended for compact atomic clocks that greatly simplifies the laser setup by stabilizing the pumping-laser frequency to the atoms involved in the clock,…
Inverter Based Generators (IBGs) have been increasing significantly in power systems. Due to the demanding thermal rating of Power Electronics (PE), their contribution to the system Short Circuit Current (SCC) is much less than that from…
We demonstrate a high-performance coherent-population-trapping (CPT) Cs vapor cell atomic clock using the push-pull optical pumping technique (PPOP) in the pulsed regime, allowing the detection of high-contrast and narrow Ramsey-CPT…
A 3.8ps root mean square (RMS) time synchronization implemented in a 20nm fabrication process ultrascale kintex Field Programmable Gate Array (FPGA) is presented. The multichannel high-speed serial transceivers (e.g. GTH) play a key role in…
We have developed a new laser-based time calibration system for highly segmented scintillator counters like the MEG II pixelated Timing Counter (pTC), consisting of 512-centimeter scale scintillator counters read out by silicon…
This paper describes a comprehensive measurement model for the error budget of pulse arrival times with emphasis on intrinsic pulse jitterand plasma propagation effects (particularly interstellar scattering), which are stochastic in time…
Stochastic computing (SC) presents high error tolerance and low hardware cost, and has great potential in applications such as neural networks and image processing. However, the bitstream generator, which converts a binary number to…
We present a NIM 2U slow-control system designed for continuous monitoring of environmental and facility parameters during data taking in nuclear physics experiments. The architecture integrates a base controller board with eight channels…
Different time-discretization methods for equivalent-control based sliding mode control (ECB-SMC) are presented. A new discrete-time sliding mode control scheme is proposed for linear time-invariant (LTI) systems. It is error-free in the…
The timing system focuses on synchronizing and coordinating each subsystem according to the trigger signals. A new prototype timing slave node based on precision time protocol has been developed by using ARM STM32 platform. The proposed…
This paper presents a set of robust PI tuning formulae for a first order plus dead time process using particle swarm optimization. Also, tuning formulae for an integrating process with dead time, which is a special case of a first order…
Model predictive control (MPC) is widely used in industries but implementing it poses challenges due to hardware or time constraints. A promising solution is to approximate the MPC policy using function approximators like neural networks.…
For atomic frequency standards in which fluctuations of the local oscillator (LO) frequency are the dominant noise source, we examine the role of the servo algorithm that predicts and corrects these frequency fluctuations. We derive the…
This paper examines synchronization of computer clocks connected via a data network and proposes a skewless algorithm to synchronize them. Unlike existing solutions, which either estimate and compensate the frequency difference (skew) among…
Cycle-accurate simulators are widely used to study systolic accelerators, yet their accuracy and usability are often limited by weak validation against real hardware and poor integration with modern ML compiler stacks. This paper presents…
In the field of cryptography till date the 1-byte in 1-clock is the best known RC4 hardware design [1], while the 1-byte in 3clocks is the best known implementation [2,3]. The design algorithm in [1] considers two consecutive bytes together…
With the continued deployment of synchronized Phasor Measurement Units (PMUs), high sample rate data are rapidly increasing the real time observability of power systems. Prior research has shown that the statistics of these data can provide…