Related papers: A Software-based Low-Jitter Servo Clock for Inexpe…
Prior research has demonstrated that global positioning system (GPS) spoofing attacks on phasor measurement units (PMUs) can cripple power system operation. This paper provides an experimental evidence of the feasibility of such an attack…
We present a slow control system to gather all relevant environment information necessary to effectively and reliably run an HPC (High Performance Computing) system at a high value over price ratio. The scalable and reliable overall concept…
Over the past three decades, numerous controllers have been developed to regulate complex chemical processes, but they have certain limitations. Traditional PI/PID controllers often require customized tuning for various set-point scenarios.…
CPU simulators are vital for computer architecture research, primarily for estimating performance under different programs. This poses challenges for fast and accurate simulation of modern CPUs, especially in multi-core systems. Modern CPU…
This research proposes a Sliding Mode PID (SMC-PID) controller to improve the speed control performance of DC servo motors, which are widely used in industrial applications such as robotics and CNC. The objective of the proposed controller…
In this document, the supervisory control and data acquisition (SCADA) and phasor measurement unit (PMU) measurement chain modeling will be studied, where the measurement error sources of each component in the SCADA and PMU measurement…
At submicron manufacturing technology nodes process variations affect circuit performance significantly. This trend leads to a large timing margin and thus overdesign to maintain yield. To combat this pessimism, post-silicon clock tuning…
The demand for high performance embedded processors, for consumer electronics, is rapidly increasing for the past few years. Many of these embedded processors depend upon custom built Instruction Ser Architecture (ISA) such as game…
In modern smart grids deployed with various advanced sensors, e.g., phasor measurement units (PMUs), bad (anomalous) measurements are always inevitable in practice. Considering the imperative need for filtering out potential bad data, this…
In the present work, an embedded PI controller is designed for speed regulation of DC servomotor over a wireless network. The embedded controller integrates PI controller with a proposed time-delay estimator and an adaptive digital Smith…
We consider the problem of estimating timing of measurements and actuation in distributed sensor and control systems with central processing. The focus is on direct timing estimation for scenarios where clock synchronization is not feasible…
We briefly describe the Poor Man's Supercomputer (PMS) project carried out at Eotvos University, Budapest. The goal was to develop a cost effective, scalable, fast parallel computer to perform numerical calculations of physical problems…
Despite the success of model predictive control (MPC), its application to high-dimensional systems, such as flexible structures and coupled fluid/rigid-body systems, remains a largely open challenge due to excessive computational…
In 1949, Ramsey's method of separated oscillating fields was elaborated boosting over many decades metrological performances of atomic clocks and becoming the standard technique for very high precision spectroscopic measurements. A…
An automatic clock synchronizing method implemented in field programmable gate array (FPGA) is proposed in this paper. It is developed for the clock system which will be applied in the end-cap time of flight (ETOF) upgrade of the Beijing…
Programmable photonic circuits (PPCs) have garnered substantial interest in achieving deep learning accelerations and universal quantum computations. Although photonic computation using PPCs offers critical advantages, including ultrafast…
Consider an arbitrary network of communicating modules on a chip, each requiring a local signal telling it when to execute a computational step. There are three common solutions to generating such a local clock signal: (i) by deriving it…
This paper presents a low power, low jitter LC phase locked loop (PLL) which has been designed and fabricated in a commercial 0.25-um Silicon-on-Sapphire CMOS technology. Random jitter and deterministic jitter of the PLL are 1.3 ps and 7.5…
As the acquisition cost of the graphics processing unit (GPU) has decreased, personal computers (PC) can handle optimization problems nowadays. In optimization computing, intelligent swarm algorithms (SIAs) method is suitable for…
We present a new method for statistical process control (SPC) of a discrete part manufacturing system based on intrinsic geometrical properties of the parts, estimated from three-dimensional sensor data. An intrinsic method has the…