Related papers: Getting to the Bottom of Negative Capacitance FETs
In this work, we analyze the ferroelectric (FE) domain-wall (DW) induced negative capacitance (NC) effect in Metal-FE-Insulator-Metal (MFIM) and Metal-FE-Insulator-Semiconductor (MFIS) stacks. Our analysis is based on 2D phase field…
Carbon nanotube field-effect transistors (CNT FETs) are regarded as promising candidates for next-generation energy-efficient computing systems. While research has employed the lift-off process to demonstrate the performance of CNT FETs,…
Spin-gapless semiconductors (SGSs) are a promising class of materials for spintronic applications, enabling functions beyond conventional electronics. This study introduces a novel design for multifunctional spintronic field-effect…
Large capacitance enhancement is useful for increasing the gate capacitance of field-effect transistors (FETs) to produce low-energy-consuming devices with improved gate controllability. We report strong capacitance enhancement effects in a…
Silicon carbide is a wide-bandgap semiconductor with an emerging CMOS technology platform and it is widely deployed in high power and harsh environment electronics. This material is also attracting interest for quantum technologies through…
Various models leading to predictions of negative capacitance, C, are briefly reviewed. Their relation to the nature of electric control is discussed. We reconfirm that the calculated double layer capacitance can be negative under S-control…
Subthreshold circuit designs are very much popular for some of the ultra low power applications, where the minimum energy consumption is the primary concern. But, due to the weak driving current, these circuits generally suffer from huge…
The band-to-band tunneling transistors have some performance advantages over the conventional MOSFETs due to the <60mV/dec sub-threshold slope. In this paper, carbon nanotubes are used as a model channel material to address issues that we…
Extensive numerical calculations show that the capacitance of back-gated nanowires with various degrees of dielectric embeddings is accurately described with an effective dielectric constant as long as the difference between the dielectric…
A robust power gating design using Graphene Nano-Ribbon Field Effect Transistors (GNRFET) is proposed using 16nm technology. The Power Gating (PG) structure is composed of GNRFET as a power switch and MOS power gated module. The proposed…
Carbon Nanotube (CNT) appears as a promising candidate to shrink field-effect transistors (FET) to the nanometer scale. Extensive experimental works have been performed recently to develop the appropriate technology and to explore DC…
With decreasing device dimensions, the performance of carbon nanotube field-effect transistors (CNFETs) is limited by high Off currents except at low drain voltages. We show that an asymmetric design improves the performance, reducing Off…
Nanoelectromechanical systems, or NEMS, are MEMS scaled to submicron dimensions. In this size regime, it is possible to attain extremely high fundamental frequencies while simultaneously preserving very high mechanical responsivity (small…
The many-body ground state of a two-dimensional electron system can be tuned by Coulomb engineering through control of the dielectric environment. However, in conventional dielectrics the static permittivity is restricted to positive…
The so-called negative electron compressibility refers to the lowering of the chemical potential of a metallic system when the carrier density increases. This effect has often been invoked in the past to explain the enhancement of the…
Superconductivity is inevitably suppressed in reduced dimensionality. Questions of how thin superconducting wires or films can be before they lose their superconducting properties have important technological ramifications and go to the…
The complementary field-effect transistors (CFETs), featuring vertically stacked n/p-FETs, enhance integration density and significantly reduce the area of standard cells such as static random-access memory (SRAM). However, the advantage of…
In the standard MOSFET description of the drain current $I_{D}$ as a function of applied gate voltage $V_{GS}$, the subthreshold swing $SS(T)\equiv dV_{GS}/d\log I_{D}$ has a fundamental lower limit as a function of temperature $T$ given by…
Security and energy are considered as the most important parameters for designing and building a computing system nowadays. Today's attacks target different layers of the computing system (i.e. software and hardware). Introduction of new…
Using a tight-binding mode-space NEGF technique, we explore the essential physics, design and performance potential of the III-V core-shell (CS) nanowire (NW) heterojunction TFET. The CS TFET line-tunneling current increases significantly…