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We propose a distributed system based on lowpower embedded FPGAs designed for edge computing applications focused on exploring distributing scheduling optimizations for Deep Learning (DL) workloads to obtain the best performance regarding…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-05-31 Hans Johnson , Tianyang Fang , Alejandro Perez-Vicente , Jafar Saniie

This work focuses on an efficient Agile design methodology for domain-specific accelerators. We employ feature-by-feature enhancement of a vertical development stack and apply it to the TVM/VTA inference accelerator. We have enhanced the…

Specialized accelerators for tensor-operations, such as blocked-matrix operations and multi-dimensional convolutions, have been emerged as powerful architecture choices for high-performance Deep-Learning computing. The rapid development of…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-04-24 Dionysios Diamantopoulos , Burkhard Ringlein , Mitra Purandare , Gagandeep Singh , Christoph Hagleitner

FPGAs have shown great potential in providing low-latency and energy-efficient solutions for deep neural network (DNN) inference applications. Currently, the majority of FPGA-based DNN accelerators in the cloud run in a time-division…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-03-30 Shulin Zeng , Guohao Dai , Hanbo Sun , Kai Zhong , Guangjun Ge , Kaiyuan Guo , Yu Wang , Huazhong Yang

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov

Deep learning (DL) is becoming the cornerstone of numerous applications both in datacenters and at the edge. Specialized hardware is often necessary to meet the performance requirements of state-of-the-art DL models, but the rapid pace of…

Hardware Architecture · Computer Science 2025-12-16 Andrew Boutros , Aman Arora , Vaughn Betz

Deep Learning (DL) acceleration support in CPUs has recently gained a lot of traction, with several companies (Arm, Intel, IBM) announcing products with specialized matrix engines accessible via GEMM instructions. CPUs are pervasive and…

There is an increasing need to bring machine learning to a wide diversity of hardware devices. Current frameworks rely on vendor-specific operator libraries and optimize for a narrow range of server-class GPUs. Deploying workloads to new…

Current Vision-Language-Action (VLA) models rely on fixed computational depth, expending the same amount of compute on simple adjustments and complex multi-step manipulation. While Chain-of-Thought (CoT) prompting enables variable…

Robotics · Computer Science 2026-02-10 Yalcin Tur , Jalal Naghiyev , Haoquan Fang , Wei-Chuan Tsai , Jiafei Duan , Dieter Fox , Ranjay Krishna

Machine Learning (ML) applications demand significant computational resources, posing challenges for safety-critical domains like aeronautics. The Versatile Tensor Accelerator (VTA) is a promising FPGA-based solution, but its adoption was…

Hardware Architecture · Computer Science 2025-09-25 Anthony Faure-Gignoux , Kevin Delmas , Adrien Gauffriau , Claire Pagetti

GEneral Matrix Multiplications (GEMMs) are recurrent in high-performance computing and deep learning workloads. Typically, high-end CPUs accelerate GEMM workloads with Single-Instruction Multiple Data (SIMD) or vector Instruction Set…

Hardware Architecture · Computer Science 2025-07-08 Alexandre de Limas Santana , Adrià Armejach , Francesc Martinez , Erich Focht , Marc Casas

Deep learning (DL) has emerged as a rapidly developing advanced technology, enabling the performance of complex tasks involving image recognition, natural language processing, and autonomous decision-making with high levels of accuracy.…

Hardware Architecture · Computer Science 2026-03-11 Soumita Chatterjee , Sudip Ghosh , Tamal Ghosh , Hafizur Rahaman

The success of Deep Artificial Neural Networks (DNNs) in many domains created a rich body of research concerned with hardware accelerators for compute-intensive DNN operators. However, implementing such operators efficiently with complex…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-08-27 Dennis Rieber , Axel Acosta , Holger Fröning

This paper presents a novel, non-standard set of vector instruction types for exploring custom SIMD instructions in a softcore. The new types allow simultaneous access to a relatively high number of operands, reducing the instruction count…

Hardware Architecture · Computer Science 2021-06-15 Philippos Papaphilippou , Paul H. J. Kelly , Wayne Luk

While deep learning models have replaced hand-designed features across many domains, these models are still trained with hand-designed optimizers. In this work, we leverage the same scaling approach behind the success of deep learning to…

Compared to the first generation of deep neural networks, dominated by regular, compute-intensive kernels such as matrix multiplications (MatMuls) and convolutions, modern decoder-based transformers interleave attention, normalization, and…

Hardware Architecture · Computer Science 2026-03-06 Max Wipfli , Gamze İslamoğlu , Navaneeth Kunhi Purayil , Angelo Garofalo , Luca Benini

In recent years, the decoding algorithms in communication networks are becoming increasingly complex aiming to achieve high reliability in correctly decoding received messages. These decoding algorithms involve computationally complex…

Hardware Architecture · Computer Science 2018-09-11 Waqar Ahmad , Imran Hafeez Abbassi , Usman Sanwal , Hasan Mahmood

Object recognition is a key enabler across industry and defense. As technology changes, algorithms must keep pace with new requirements and data. New modalities and higher resolution sensors should allow for increased algorithm robustness.…

Computer Vision and Pattern Recognition · Computer Science 2020-12-24 Samuel Rivera , Joel Klipfel , Deborah Weeks

Deep learning has been used in a wide range of areas and made a huge breakthrough. With the ever-increasing model size and train-ing data volume, distributed deep learning emerges which utilizes a cluster to train a model in parallel.…

Networking and Internet Architecture · Computer Science 2022-08-11 Heng Pan , Penglai Cui , Zhenyu li , Ru Jia , Penghao Zhang , Leilei Zhang , Ye Yang , Jiahao Wu , Jianbo Dong , Zheng Cao , Qiang Li , Hongqiang Harry Liu , Mathy Laurent , Gaogang Xie

Transformers and vision-language models (VLMs) have emerged as dominant architectures in computer vision and multimodal AI, offering state-of-the-art performance in tasks such as image classification, object detection, visual question…

Hardware Architecture · Computer Science 2025-09-05 Safa Mohammed Sali , Mahmoud Meribout , Ashiyana Abdul Majeed
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