Related papers: A tunnel FET compact model including non-idealitie…

In this paper, an analytical predictive model of interface charge traps in symmetric long channel double-gate junctionless transistors is proposed based on a charge-based model. Interface charge traps arising from the exposure to chemicals,…

We investigate the thermoelectric performance of 2D nanojunctions with gate tunable architectures and varying channel lengths from 3 to 12 nm using a combination of first principles simulations, including density functional theory, DFT with…

We propose Graphene Klein tunnel transistors (GKTFET) as a way to enforce current saturation while maintaining large mobility for high speed radio frequency (RF) applications. The GKTFET consists of a sequence of angled graphene p-n…

With the development of ferroelectric memories, it is becoming increasingly important to understand the ferroelectric switching behaviors at small applied electric fields. In this \rv{paper}, we use discretized phase-field models to…

In recent years, a lot of scientific research effort has been put forth for the investigation of Transition Metal Dichalcogenides (TMDC) and other Two Dimensional (2D) materials like Graphene, Boron Nitride. Theoretical investigation on the…

The concept of the deep trapping gate device was introduced fairly recently on the basis of technological and transport simulations currently used in the field of classical electron devices. The concept of a buried gate containing localized…

In this paper, a two-dimensional analytical model of a laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO$_2$ and HfO$_2$ is derived. The model…

The paper discusses an application of the field effected transistor (FET) as a voltage controlled resistance which can be done in under-graduate labs either as a routine experiment or as a project.

We study the superconducting properties of a two-dimensional superconductor in the proximity to an electronic topological transition (ETT). In contrast to the 3D case, we find that the superconducting gap at T=0, the critical temperature…

A theoretical technique which allows to include contributions from non-orthogonality of the electron states in the leads connected to a tunneling junction is derived. The theory is applied to a single barrier tunneling structure and a…

The electrical performance of a tunnel field-effect transistor depends critically on the band offset at their semiconductor heterojunction interface. Historically, it has been difficult to experimentally determine how the electronic bands…

Electrical spin injection from ferromagnetic metals into graphene is hindered by the impedance mismatch between the two materials. This problem can be reduced by the introduction of a thin tunnel barrier at the interface. We present room…

We suggest a theory of internal coherent tunneling in the pseudogap region, when the applied voltage U is below the free electron gap 2Delta_0. We address quasi 1D systems, where the gap is originated by spontaneous lattice distortions of…

This letter presents experiments on junctions fabricated by a new technique that enables the use of high quality aluminum oxide tunnel barriers with normal metal electrodes at low temperatures. Inverse proximity effect is applied to…

During the last years, Graphene based Field Effect Transistors (GFET) have shown outstanding RF performance; therefore, they have attracted considerable attention from the electronic devices and circuits communities. At the same time,…

Metallic nanoparticles offer possibilities to build basic electric devices with new functionality and improved performance. Due to the small volume and the resulting low self-capacitance, each single nanoparticle exhibits a high charging…

This paper presents a symmetric unified transport (UT) compact model for metal-oxide-semiconductor field-effect transistors (MOSFETs) that bridges drift-diffusion (DD) and ballistic transport (BT) regimes. The proposed model self…

Here, we propose a Charge Plasma (CP)-based Germanium Double Gate Tunnel Field-Effect Transistor (Ge-DGTFET) device structure, where a CP is induced in the heavily doped source region using the work function engineering of source electrode.…

Tunneling electroresistance (TER) effect is the change in the electrical resistance of a ferroelectric tunnel junction (FTJ) associated with polarization reversal in the ferroelectric barrier layer. Here we predict that a FTJ with a…

The presence of interface states at the MOS interface is a well-known cause of device degradation. This is particularly true for ultra-scaled FinFET geometries where the presence of a few traps can strongly influence device behavior.…