Related papers: Channel thickness optimization for ultra thin and …

Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…

A simple electronic experiment with a field effect transistor type microstructure is suggested. The thin superconductor layer is the source-drain channel of the layered structure where an AC current is applied. It is necessary to measure…

Using self-consistent quantum transport simulation on realistic devices, we show that InAs band-to-band Tunneling Field Effect Transistors (TFET) with a heavily doped pocket in the gate-source overlap region can offer larger ON current and…

In this paper, we introduce a density-based topology optimization framework to design porous electrodes for maximum energy storage. We simulate the full cell with a model that incorporates electronic potential, ionic potential, and…

A framework for topology optimization of cooling channels is proposed, which paves the way towards automated design of additively-manufactured cooling channels, required in applications such as the efficient heat management of die casting…

Using atomistic electronic structure calculations and Boltzmann semi-classical transport we compute the thermoelectric power factor of ultra-thin-body p-type Si layers of thicknesses from W=3nm up to 10nm. We show that the power factor for…

Two dimensional (2D) crystal heterostructures are shown to possess a unique opportunity for novel THz nonlinear devices. In contrast to the oxide tunneling barrier, the uniformity of 2D insulators in the thickness control provides an ideal…

III-V tunneling field-effect transistors (TFETs) offer great potentials in future low-power electronics application due to their steep subthreshold slope and large "on" current. Their 3D quantum transport study using non-equilibrium Green's…

In contrast to its bulk crystals, the FeSe film or layer exhibits better superconductivity performance, which attract much interest in its fundamental research as well as potential application. In present work, transition from insulator to…

Making ultra-short gate-length transistors significantly contributes to scaling the contacted gate pitch. This, in turn, plays a vital role in achieving smaller standard logic cells for enhanced logic density scaling. As we push the…

Channel wall sheath thickness in an anode-layer Hall thruster RAIJIN66 was investigated by a two-dimensional hybrid simulation and a one-dimensional sheath model. A hybrid particle-fluid model with the quasineutrality assumption was used to…

The main promise of tunnel FETs (TFETs) is to enable supply voltage ($V_{DD}$) scaling in conjunction with dimension scaling of transistors to reduce power consumption. However, reducing $V_{DD}$ and channel length ($L_{ch}$) typically…

Recently, the superconductivity of bilayer nickelate La3Ni2O7 has been observed in the thin film at ambient pressure, facilitated by epitaxial strain. Here, we investigate the effects of film thickness and carrier doping on the electronic…

Enabling applications for solid state quantum technology will require systematically reducing noise, particularly dissipation, in these systems. Yet, when multiple decay channels are present in a system with similar weight, resolution to…

Thanks to their unique properties single-layer 2-D materials appear as excellent candidates to extend Moore's scaling law beyond the currently manufactured silicon FinFETs. However, the known 2-D semiconducting components, essentially…

In this work, we demonstrate enhancement-mode field-effect transistors by atomic-layer-deposited (ALD) amorphous In2O3 channel with thickness down to 0.7 nm. Thickness is found to be critical on the materials and electron transport of…

3D bicontinuous two-phase materials are increasingly gaining interest because of their unique multifunctional characteristics and advancements in techniques to fabricate them. Due to their complex topological and structural properties, it…

The continuous scaling of semiconductor technology has pushed the footprint of logic devices below 50 nm. Currently, logic standard cells with one single fin are being investigated to increase the integration density, although such options…

Dimensionality tuning is an important method to modify the electronic states of quantum materials. However, the mechanism of such tuning in heavy fermion systems and its connection with transport properties remain largely unexplored. Here…

Two-dimensional (2D) van der Waals semiconductors represent the thinnest, air stable semiconducting materials known. Their unique optical, electronic and mechanical properties hold great potential for harnessing them as key components in…