Related papers: Design flow for readout ASICs in High-energy Physi…

Given the ever-increasing advances of digital microfluidic biochips and their application in a wide range of areas including bio-chemistry experiments, diagnostics, and monitoring purposes like air and water quality control and etc.,…

This work introduces MICSim, an open-source, pre-circuit simulator designed for early-stage evaluation of chip-level software performance and hardware overhead of mixed-signal compute-in-memory (CIM) accelerators. MICSim features a modular…

The present thesis follows a three years' work in design, realization and operation of electronic circuits for the readout of particle and radiation sensors, carried out in close collaboration with the Istituto Nazionale di Fisica Nucleare…

TIGER (Turin Integrated Gem Electronics for Readout) is a mixed-mode front-end ASIC developed to readout the new inner tracking detector of the BESIII experiment, carried out at BEPCII in Beijing. The detector is planned to be installed…

Motivated by the demand for energy-efficient communication solutions in the next generation cellular network, a mixed-ADC receiver architecture for massive multiple input multiple output (MIMO) systems is proposed, which differs from…

We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a previously submitted demonstrator ASIC designed for timing…

Autonomous experimentation systems have been used to greatly advance the integrated computational materials engineering (ICME) paradigm. This paper outlines a framework that enables the design and selection of data collection workflows for…

We present the first characterization results of Timespot1, an ASIC designed in CMOS 28 nm technology, featuring a $32 \times 32$ pixel matrix with a pitch of $55 ~ \mu m$. Timespot1 is the first small-size prototype, conceived to readout…

Photonic Integrated Circuits (PICs) provide superior speed, bandwidth, and energy efficiency, making them ideal for communication, sensing, and quantum computing applications. Despite their potential, PIC design workflows and integration…

System-level design, once the province of board designers, has now become a central concern for chip designers. Because chip design is a less forgiving design medium -- design cycles are longer and mistakes are harder to correct --…

Artificial Intelligence is poised to transform the design of complex, large-scale detectors like the ePIC at the future Electron Ion Collider. Featuring a central detector with additional detecting systems in the far forward and far…

As a step in the architectural design of a quantum processing or sensing system with control and signaling, an attempt is made at putting in parallel functional properties of the random flows between neurons through electrical synapses, and…

Solid-state quantum computers require classical electronics to control and readout individual qubits and to enable fast classical data processing [1-3]. Integrating both subsystems at deep cryogenic temperatures [4], where solid-state…

For the High-Luminosity phase of LHC, the ATLAS experiment is proposing the addition of a High Granularity Timing Detector (HGTD) in the forward region to mitigate the effects of the increased pile-up. The chosen detection technology is Low…

A dedicated front-end electronics has been developed for the trigger chambers of the ALICE muon spectrometer which will work at the future LHC at CERN. These trigger chambers are based on RPCs (Resistive Plate Chambers) working in streamer…

The next generation experiment in high energy particle physics will be International Linear Collider of electron and positron at the TeV scale. The experiment is aim to search the Higgs particle and to measure its properties. The physics…

We present an array of leaky integrate-and-fire (LIF) neuron circuits designed for the second-generation BrainScaleS mixed-signal 65-nm CMOS neuromorphic hardware. The neuronal array is embedded in the analog network core of a scaled-down…

This work reports a cost-effective, multi-parameter readout and data-acquisition system for a muon scattering tomography system based on Resistive Plate Chambers (RPCs). Initial test measurements with a prototype Resistive Plate Chamber…

Input devices, such as buttons and sliders, are the foundation of any interface. The typical user-centered design workflow requires the developers and users to go through many iterations of design, implementation, and analysis. The…

In this paper, to suppress jamming in the complex electromagnetic environment, we propose a joint transmit waveform and receive filter design framework for integrated sensing and communications (ISAC). By jointly optimizing the transmit…