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As large-scale HPC compute clusters increasingly adopt accelerators such as GPUs to meet the voracious demands of modern workloads, these clusters are increasingly becoming power constrained. Unfortunately, modern applications can often…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-10 Rutwik Jain , Yiwei Jiang , Matthew D. Sinclair , Shivaram Venkataraman

With the current rate of data growth, processing needs are becoming difficult to fulfill due to CPU power and energy limitations. Data serving systems and especially persistent key-value stores have become a substantial part of data…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-09-01 Stella Mikrou , Anastasios Papagiannis , Giorgos Saloustros , Manolis Marazakis , Angelos Bilas

Shared virtual memory (SVM) is key in heterogeneous systems on chip (SoCs), which combine a general-purpose host processor with a many-core accelerator, both for programmability and to avoid data duplication. However, SVM can bring a…

Hardware Architecture · Computer Science 2018-08-30 Andreas Kurth , Pirmin Vogel , Andrea Marongiu , Luca Benini

This paper summarizes the idea of Tiered-Latency DRAM (TL-DRAM), which was published in HPCA 2013, and examines the work's significance and future potential. The capacity and cost-per-bit of DRAM have historically scaled to satisfy the…

Hardware Architecture · Computer Science 2018-05-09 Donghyuk Lee , Yoongu Kim , Vivek Seshadri , Jamie Liu , Lavanya Subramanian , Onur Mutlu

Most load balancing techniques implemented in current data centers tend to rely on a mapping from packets to server IP addresses through a hash value calculated from the flow five-tuple. The hash calculation allows extremely fast packet…

Networking and Internet Architecture · Computer Science 2017-07-11 Qingkai Liang , Sem Borst

Bit-serial Processing-In-Memory (PIM) is an attractive paradigm for accelerator architectures, for parallel workloads such as Deep Learning (DL), because of its capability to achieve massive data parallelism at a low area overhead and…

Hardware Architecture · Computer Science 2023-11-21 Aman Arora , Jian Weng , Siyuan Ma , Tony Nowatzki , Lizy K. John

Modern large multicore systems often run multiple workloads that share CPUs under schedulers such as Linux CFS. To keep CPUs busy, these schedulers load-balance runnable work, causing each workload to execute on many cores. This weakens…

Operating Systems · Computer Science 2026-05-01 Jin Xin Ng , Ori Livneh , Richard O'Grady , Josh Don , Peng Ding , Samuel Grossman , Luis Otero , Chris Kennelly , David Lo , Carlos Villavieja

Decentralized resource markets are Web 3.0 applications that build open-access platforms for trading digital resources among users without any central management. They promise cost reduction, transparency, and flexible service provision.…

Cryptography and Security · Computer Science 2025-09-25 Mohamed E. Najd , Ghada Almashaqbeh

Sorting is a fundamental operation across numerous computational domains. Traditionally, this process involves transferring data from main memory to a processing unit for sorting, followed by writing the sorted data back to memory. This…

Hardware Architecture · Computer Science 2026-05-18 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

Large language models (LLMs) rely on Key-Value (KV) cache to reduce time-to-first-token (TTFT) latency, but existing disk-based KV cache systems using file-per-object layouts suffer from severe scalability bottlenecks due to file system…

Databases · Computer Science 2025-11-26 Weiping Yu , Ye Jiarui , He Mengke , Junfeng Liu , Siqiang Luo

Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high density, and fast read speed. The STT-RAM's small feature size is…

Hardware Architecture · Computer Science 2019-08-12 Kyle Kuan , Tosiron Adegbija

Multi-threaded applications are capable of exploiting the full potential of many-core systems. However, Network-on-Chip (NoC) based inter-core communication in many-core systems is responsible for 60-75% of the miss latency experienced by…

Hardware Architecture · Computer Science 2021-01-05 Abhijit Das , John Jose , Prabhat Mishra

Deep neural networks use skip connections to improve training convergence. However, these skip connections are costly in hardware, requiring extra buffers and increasing on- and off-chip memory utilization and bandwidth requirements. In…

Scalability is one of the main roadblocks to business adoption of blockchain systems. Despite recent intensive research on using sharding techniques to enhance the scalability of blockchain systems, existing solutions do not efficiently…

Databases · Computer Science 2020-02-18 Mohammad Javad Amiri , Divyakant Agrawal , Amr El Abbadi

Large persistent memories such as NVDIMM have been perceived as a disruptive memory technology, because they can maintain the state of a system even after a power failure and allow the system to recover quickly. However, overheads incurred…

Hardware Architecture · Computer Science 2021-06-29 Jie Zhang , Miryeong Kwon , Donghyun Gouk , Sungjoon Koh , Nam Sung Kim , Mahmut Taylan Kandemir , Myoungsoo Jung

Querying graph data with low latency is an important requirement in application domains such as social networks and knowledge graphs. Graph queries perform multiple hops between vertices. When data is partitioned and stored across multiple…

Databases · Computer Science 2022-12-21 Nathan Ng , Hung Le , Marco Serafini

A rising research challenge is running costly machine learning (ML) networks locally on resource-constrained edge devices. ML networks with large convolutional layers can easily exceed available memory, increasing latency due to excessive…

Machine Learning · Computer Science 2023-07-20 Jackson Farley , Andreas Gerstlauer

The storage manager, as a key component of the database system, is responsible for organizing, reading, and delivering data to the execution engine for processing. According to the data serving mechanism, existing storage managers are…

Databases · Computer Science 2019-05-20 Ye Zhu

Datacenters suffer from resource utilization inefficiencies due to the conflicting goals of service owners and platform providers. Service owners intending to maintain Service Level Objectives (SLO) for themselves typically request a…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-07-27 Sayak Chakraborti , Brian Coutinho , Sandhya Dwarkadas , Parth Malani , Bikash Sharma

IoT applications increasingly rely on on-device AI accelerators to ensure high performance, especially in low-connectivity and safety-critical scenarios. However, the limited on-chip memory of these accelerators forces inference runtimes to…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-13 Nathan Ng , Walid A. Hanafy , Prashanthi Kadambi , Balachandra Sunil , Ayush Gupta , David Irwin , Yogesh Simmhan , Prashant Shenoy
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