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Algorithms and a hardware accelerator for performing stochastic rounding (SR) are presented. The main goal is to augment the ARM M4F based multi-core processor SpiNNaker2 with a more flexible rounding functionality than is available in the…

Hardware Architecture · Computer Science 2020-07-01 Mantas Mikaitis

Spiking neural networks (SNNs) are powerful models of spatiotemporal computation and are well suited for deployment on resource-constrained edge devices and neuromorphic hardware due to their low power consumption. Leveraging attention…

Neural and Evolutionary Computing · Computer Science 2024-11-13 Boxun Xu , Junyoung Hwang , Pruek Vanna-iampikul , Sung Kyu Lim , Peng Li

Graphics Processing Units (GPUs) have become the leading hardware accelerator for deep learning applications and are used widely in training and inference of transformers; transformers have achieved state-of-the-art performance in many…

Hardware Architecture · Computer Science 2024-05-03 Andy He , Darren Key , Mason Bulling , Andrew Chang , Skyler Shapiro , Everett Lee

Performance of distributed data center applications can be improved through use of FPGA-based SmartNICs, which provide additional functionality and enable higher bandwidth communication. Until lately, however, the lack of a simple approach…

Cryptography and Security · Computer Science 2022-04-12 Rushi Patel , Pouya Haghi , Shweta Jain , Andriy Kot , Venkata Krishnan , Mayank Varia , Martin Herbordt

Sparse graphs are ubiquitous in real and virtual worlds. With the phenomenal growth in semi-structured and unstructured data, sizes of the underlying graphs have witnessed a rapid growth over the years. Analyzing such large structures…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-01-08 Ashwina Kumar , M. Venkata Krishna , Prasanna Bartakke , Rahul Kumar , Rajesh Pandian M , Nibedita Behera , Rupesh Nasre

Hardware-based acceleration is an extensive attempt to facilitate many computationally-intensive mathematics operations. This paper proposes an FPGA-based architecture to accelerate the convolution operation - a complex and expensive…

Hardware Architecture · Computer Science 2023-02-28 Trung Dinh Pham , Bao Gia Bach , Lam Trinh Luu , Minh Dinh Nguyen , Hai Duc Pham , Khoa Bui Anh , Xuan Quang Nguyen , Cuong Pham Quoc

The continued growth in the processing power of FPGAs coupled with high bandwidth memories (HBM), makes systems like the Xilinx U280 credible platforms for linear solvers which often dominate the run time of scientific and engineering…

Hardware Architecture · Computer Science 2023-01-02 Linghao Song , Licheng Guo , Suhail Basalama , Yuze Chi , Robert F. Lucas , Jason Cong

CPU-FPGA heterogeneous architectures are attracting ever-increasing attention in an attempt to advance computational capabilities and energy efficiency in today's datacenters. These architectures provide programmers with the ability to…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-09-24 Jason Cong , Peng Wei , Cody Hao Yu , Peng Zhang

Edge computing devices inherently face tight resource constraints, which is especially apparent when deploying Deep Neural Networks (DNN) with high memory and compute demands. FPGAs are commonly available in edge devices. Since these…

Hardware Architecture · Computer Science 2021-10-04 Jude Haris , Perry Gibson , José Cano , Nicolas Bohm Agostini , David Kaeli

As a promising solution to boost the performance of distance-related algorithms (e.g., K-means and KNN), FPGA-based acceleration attracts lots of attention, but also comes with numerous challenges. In this work, we propose AccD, a…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-09-02 Yuke Wang , Boyuan Feng , Gushu Li , Lei Deng , Yuan Xie , Yufei Ding

This paper presents an in-depth analysis of timing closure challenges and constraints in Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). We examine core timing principles, architectural…

Hardware Architecture · Computer Science 2025-11-03 Mostafa Darvishi

AMD Xilinx's new Versal Adaptive Compute Acceleration Platform (ACAP) is an FPGA architecture combining reconfigurable fabric with other on-chip hardened compute resources. AI engines are one of these and, by operating in a highly…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-31 Nick Brown

Spiking Neural Networks (SNNs) can reduce energy consumption compared to conventional Artificial Neural Networks (ANNs) when spiking activity is sparse and the neuron model is hardware-friendly. However, biologically faithful models are…

Neural and Evolutionary Computing · Computer Science 2026-05-13 Pascal Harmeling , Florent De Geeter , Guillaume Drion

Architectural simulation has become the critical bottleneck limiting design space exploration for high-performance computing systems. Modern GPUs and AI accelerators -- with hundreds to thousands of tightly-coupled components -- demand…

Hardware Architecture · Computer Science 2026-05-25 Wei-Fen Lin , Jen-Chien Chang , Yen-Po Chen , Zi-Yi Tai , Yu-Cheng Chang , Chia-Pao Chiang , Yu-Yang Lee , Yu-Jie Wan

Barriers that prevent programmers from using FPGAs include the need to work within vendor specific CAD tools, knowledge of hardware programming models, and the requirement to pass each design through synthesis, place and route. In this…

Hardware Architecture · Computer Science 2016-03-04 Zeyad Aklah , Sen Ma , David Andrews

Spatial Branch and Bound (B&B) algorithms are widely used for solving nonconvex problems to global optimality, yet they remain computationally expensive. Though some works have been carried out to speed up B&B via CPU parallelization, GPU…

Optimization and Control · Mathematics 2025-07-29 Hongzhen Zhang , Tim Kerkenhoff , Neil Kichler , Manuel Dahmen , Alexander Mitsos , Uwe Naumann , Dominik Bongartz

The Square Kilometre Array (SKA) project will be the world largest radio telescope array. With its large number of antennas, the number of signals that need to be processed is dramatic. One important element of the SKA's Central Signal…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-02 Haomiao Wang , Prabu Thiagaraj , Oliver Sinnen

This paper investigates the multi-GPU performance of a 3D buoyancy driven cavity solver using MPI and OpenACC directives on different platforms. The paper shows that decomposing the total problem in different dimensions affects the strong…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-06-10 Weicheng Xue , Christopher J. Roy

This study presents advanced neural network architectures including Convolutional Neural Networks (CNN), Recurrent Neural Networks (RNN), Long Short-Term Memory Networks (LSTMs), and Deep Belief Networks (DBNs) for enhanced ECG signal…

Hardware Architecture · Computer Science 2023-07-18 Kayode Inadagbo , Baran Arig , Nisanur Alici , Murat Isik

In recent years, high speed and high resolution analog-to-digital converter (ADC) is widely employed in many physical experiments, especially in high precision time and charge measurement. The rapid increasing amount of digitized data…

Signal Processing · Electrical Eng. & Systems 2018-06-14 Guangyuan Yuan , Zhe cao , Shuwen Wang , Shubin Liu , Qi An