Related papers: Design of Efficient Reversible Logic Based Binary …
For universal quantum computation, a major challenge to overcome for practical implementation is the large amount of resources required for fault-tolerant quantum information processing. An important aspect is implementing arbitrary unitary…
We propose an implementation of bivariate bicycle codes (Nature {\bf 627}, 778 (2024)) based on long-range Rydberg gates between stationary neutral atom qubits. An optimized layout of data and ancilla qubits reduces the maximum Euclidean…
We propose hardware-efficient schemes for implementing logical H and S gates transversally on rotated surface codes with reconfigurable neutral atom arrays. For logical H gates, we develop a simple strategy to rotate code patches…
Adders are fundamental components in digital circuits, playing a crucial role in arithmetic operations within computing systems and many other applications. This paper focuses on the design and simulation of a 32-bit Brent-Kung parallel…
We develop a framework for resource efficient compilation of higher-level programs into lower-level reversible circuits. Our main focus is on optimizing the memory footprint of the resulting reversible networks. This is motivated by the…
The paper discusses various applications of permutation group theory in the synthesis of reversible logic circuits consisting of Toffoli gates with negative control lines. An asymptotically optimal synthesis algorithm for circuits…
In this thesis we examine a variety of techniques for reducing the resources required for fault-tolerant quantum computation. First, we show how to simplify universal encoded computation by using only transversal gates and standard error…
Near zero-energy computing describes the concept of executing logic operations below the (kBT ln 2) energy limit. Landauer discussed that it is impossible to break this limit as long as the computations are performed in the conventional,…
We design new continuous phase modulation (CPM) formats which are based on the combination of a proper precoder with binary input and a ternary CPM. The proposed precoder constrains the signal phase evolution in order to increase the…
An algorithm for reversible logic synthesis is proposed. The task is, for a given $n$-bit substitution map $P_n: \{0,1\}^n \rightarrow \{0,1\}^n$, to find a sequence of reversible logic gates that implements the map. The gate library…
Flexible Electronics (FE) offer distinct advantages, including mechanical flexibility and low process temperatures, enabling extremely low-cost production. To address the demands of applications such as smart sensors and wearables, flexible…
Error correcting codes play a central role in digital communication, ensuring that transmitted information can be accurately reconstructed despite channel impairments. Recently, autoencoder (AE) based approaches have gained attention for…
Wristwatches have been a common fashion accessory addition for several people. However, the concept of using a seven-segment digital display or sometimes, even an analog indicator hasn't changed for a number of years. This project aims to…
In comparison to the conventional complementary pull-up and pull-down logic structure, the pass transistor logic (PTL) family reduces the number of transistors required to perform logic functions, thereby reducing both area and power…
Decimal-to-binary conversion is important to modern binary computers. The classical method to solve this problem is based on division operation. In this paper, we investigate a decimal-to-binary conversion method based on addition…
We develop novel protocols for generating loss-tolerant quantum codes; these are central for safeguarding information against qubit losses, with most crucial applications in quantum communications. Contrary to current proposals, our method…
This paper revisits polar code design for a binary-input additive white Gaussian noise (BI-AWGN) channel when successive cancellation (SC) decoding is applied at the receiver. We focus on the reciprocal channel approximation (RCA), which is…
A pinching antenna system (PASS) assisted cognitive radio (CR) system is proposed. A secondary system sum rate maximization problem is formulated by jointly considering the base station (BS) power budget, the pinching antenna (PA)…
This paper addresses the numerical optimization of proportional-integral-derivative (PID) controllers for linear time-invariant systems with delays, where the derivative action is implemented using a low-pass filter. While performance…
We consider the problem of computing a binary linear transformation using unreliable components when all circuit components are unreliable. Two noise models of unreliable components are considered: probabilistic errors and permanent errors.…