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Statistical static timing analysis deals with the increasing variations in manufacturing processes to reduce the pessimism in the worst case timing analysis. Because of the correlation between delays of circuit components, timing model…

Hardware Architecture · Computer Science 2017-05-16 Bing Li , Ning Chen , Manuel Schmidt , Walter Schneider , Ulf Schlichtmann

In this paper, we investigate the challenges to apply Statistical Static Timing Analysis (SSTA) in hierarchical design flow, where modules supplied by IP vendors are used to hide design details for IP protection and to reduce the complexity…

Hardware Architecture · Computer Science 2017-05-16 Bing Li , Ning Chen , Yang Xu , Ulf Schlichtmann

For large circuits, static timing analysis (STA) needs to be performed in a hierarchical manner to achieve higher performance in arrival time propagation. In hierarchical STA, efficient and accurate timing models of sub-modules need to be…

Hardware Architecture · Computer Science 2017-05-09 Bing Li , Christoph Knoth , Walter Schneider , Manuel Schmidt , Ulf Schlichtmann

Post-silicon clock tuning elements are widely used in high-performance designs to mitigate the effects of process variations and aging. Located on clock paths to flip-flops, these tuning elements can be configured through the scan chain so…

Hardware Architecture · Computer Science 2017-05-16 Bing Li , Ulf Schlichtmann

Level-sensitive latches are widely used in high- performance designs. For such circuits efficient statistical timing analysis algorithms are needed to take increasing process vari- ations into account. But existing methods solving this…

Other Computer Science · Computer Science 2017-05-16 Bing Li , Ning Chen , Ulf Schlichtmann

A new approach for enhancing the process-variation tolerance of digital circuits is described. We extend recent advances in statistical timing analysis into an optimization framework. Our objective is to reduce the performance variance of a…

Hardware Architecture · Computer Science 2011-11-09 Osama Neiroukh , Xiaoyu Song

In digital circuit designs, sequential components such as flip-flops are used to synchronize signal propagations. Logic computations are aligned at and thus isolated by flip-flop stages. Although this fully synchronous style can reduce…

Hardware Architecture · Computer Science 2022-03-11 Grace Li Zhang , Bing Li , Xing Huang , Xunzhao Yin , Cheng Zhuo , Masanori Hashimoto , Ulf Schlichtmann

In static timing analysis, clock-to-q delays of flip-flops are considered as constants. Setup times and hold times are characterized separately and also used as constants. The characterized delays, setup times and hold times, are ap- plied…

Hardware Architecture · Computer Science 2017-05-16 Grace Li Zhang , Bing Li , Ulf Schlichtmann

In the nano era in integrated circuit fabrication technologies, the performance variability due to statistical process and circuit parameter variations is becoming more and more significant. Considerable effort has been expended in the EDA…

Other Computer Science · Computer Science 2009-09-29 Alp Arslan Bayrakci , Alper Demir , Serdar Tasiran

This paper presents a novel statistical state-dependent timing model for voltage over scaled (VoS) logic circuits that accurately and rapidly finds the timing distribution of output bits. Using this model erroneous VoS circuits can be…

Hardware Architecture · Computer Science 2014-03-13 Aras Pirbadian , Muhammad S. Khairy , Ahmed M. Eltawil , Fadi J. Kurdahi

Many real-world systems are often regarded as weakly coupled limit-cycle oscillators, in which each oscillator corresponds to a dynamical system with many degrees of freedom that have collective oscillations. One of the most practical…

Adaptation and Self-Organizing Systems · Physics 2022-11-21 Takahiro Arai , Yoji Kawamura , Toshio Aoyagi

The increasing use of model-based tools enables further use of formal verification techniques in the context of distributed real-time systems. To avoid state explosion, it is necessary to construct verification models that focus on the…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-11-18 Chih-Hong Cheng , Christian Buckl , Javier Esparza , Alois Knoll

Process variations are a major concern in today's chip design since they can significantly degrade chip performance. To predict such degradation, existing circuit and MEMS simulators rely on Monte Carlo algorithms, which are typically too…

Computational Engineering, Finance, and Science · Computer Science 2016-11-18 Zheng Zhang , Xiu Yang , Giovanni Marucci , Paolo Maffezzoni , Ibrahim , M. Elfadel , George Em Karniadakis , Luca Daniel

In modeling time series data, we often need to augment the existing data records to increase the modeling accuracy. In this work, we describe a number of techniques to extract dynamic information about the current state of a large…

Machine Learning · Computer Science 2022-05-20 Jeeyung Kim , Mengtian Jin , Youkow Homma , Alex Sim , Wilko Kroeger , Kesheng Wu

It is well known that timing jitter can degrade the bit error rate (BER) of receivers that recover the clock from input data. However, timing jitter can also result in an indefinite increase in the settling time of clock recovery circuits,…

Emerging Technologies · Computer Science 2019-12-06 Naveen Kadayinti , Amitalok J. Budkuley , Maryam S. Baghini , Dinesh K. Sharma

Post-Silicon Tunable (PST) clock buffers are widely used in high performance designs to counter process variations. By allowing delay compensation between consecutive register stages, PST buffers can effectively improve the yield of digital…

Hardware Architecture · Computer Science 2017-05-16 Bing Li , Ning Chen , Ulf Schlichtmann

Statistic modeling and data-driven learning are the two vital fields that attract many attentions. Statistic models intend to capture and interpret the relationships among variables, while data-based learning attempt to extract information…

Machine Learning · Computer Science 2021-12-22 Jingwei Li

Modern sequential recommender systems, ranging from lightweight transformer-based variants to large language models, have become increasingly prominent in academia and industry due to their strong performance in the next-item prediction…

Information Retrieval · Computer Science 2025-08-11 Danil Gusak , Anna Volodkevich , Anton Klenitskiy , Alexey Vasilev , Evgeny Frolov

We consider the problem of estimating timing of measurements and actuation in distributed sensor and control systems with central processing. The focus is on direct timing estimation for scenarios where clock synchronization is not feasible…

Systems and Control · Computer Science 2013-09-10 John-Olof Nilsson , Peter Händel

Most data processing techniques, applied to biomedical and sociological time series, are only valid for random fluctuations that are stationary in time. Unfortunately, these data are often non stationary and the use of techniques of…

Data Analysis, Statistics and Probability · Physics 2009-11-10 M. Ignaccolo , P. Allegrini , P. Grigolini , P. Hamilton , B. J. West
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