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PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model

Hardware Architecture 2017-05-16 v1

Abstract

In static timing analysis, clock-to-q delays of flip-flops are considered as constants. Setup times and hold times are characterized separately and also used as constants. The characterized delays, setup times and hold times, are ap- plied in timing analysis independently to verify the perfor- mance of circuits. In reality, however, clock-to-q delays of flip-flops depend on both setup and hold times. Instead of being constants, these delays change with respect to different setup/hold time combinations. Consequently, the simple ab- straction of setup/hold times and constant clock-to-q delays introduces inaccuracy in timing analysis. In this paper, we propose a holistic method to consider the relation between clock-to-q delays and setup/hold time combinations with a piecewise linear model. The result is more accurate than that of traditional timing analysis, and the incorporation of the interdependency between clock-to-q delays, setup times and hold times may also improve circuit performance.

Keywords

Cite

@article{arxiv.1705.04993,
  title  = {PieceTimer: A Holistic Timing Analysis Framework Considering Setup/Hold Time Interdependency Using A Piecewise Model},
  author = {Grace Li Zhang and Bing Li and Ulf Schlichtmann},
  journal= {arXiv preprint arXiv:1705.04993},
  year   = {2017}
}

Comments

IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2016

R2 v1 2026-06-22T19:46:33.889Z