Related papers: Hardware emulation of stochastic p-bits for invert…
An abelian processor is an automaton whose output is independent of the order of its inputs. Bond and Levine have proved that a network of abelian processors performs the same computation regardless of processing order (subject only to a…
Landauer's principle places a fundamental lower limit on the work required to perform a logically irreversible operation. Logically reversible gates provide a way to avoid these work costs, and also simplify the task of making the…
Multi-qubit parity measurements are at the core of many quantum error correction schemes. Extracting multi-qubit parity information typically involves using a sequence of multiple two-qubit gates. In this paper, we propose a superconducting…
Serial connection of multiple memory cells using perpendicular magnetic tunnel junctions (pMTJ) is proposed as a way to increase magnetic random access memory (MRAM) storage density. Multi-bit storage element is designed using pMTJs…
In-memory computing for Machine Learning (ML) applications remedies the von Neumann bottlenecks by organizing computation to exploit parallelism and locality. Non-volatile memory devices such as Resistive RAM (ReRAM) offer integrated…
An optomechanical oscillator undergoes a Hopf bifurcation that connects two dynamical regimes with different information-processing capabilities: thermal Brownian motion and coherent self-sustained oscillation. Below threshold, the…
The native gate set is fundamental to the performance of quantum devices, as it governs the accuracy of basic quantum operations and dictates the complexity of implementing quantum algorithms. Traditional approaches to extending gate sets…
The search of hardware-compatible strategies for solving NP-hard combinatorial optimization problems (COPs) is an important challenge of today s computing research because of their wide range of applications in real world optimization…
Magnetic Random-Access Memory (MRAM) based p-bit neuromorphic computing devices are garnering increasing interest as a means to compactly and efficiently realize machine learning operations in Restricted Boltzmann Machines (RBMs). When…
It has been shown that unclocked, recurrent networks of Boolean gates in FPGAs can be used for low-SWaP reservoir computing. In such systems, topology and node functionality of the network are randomly initialized. To create a network that…
We propose a prime factorizer operated in a framework of quantum annealing (QA). The idea is inverse operation of a multiplier implemented with QA-based Boolean logic circuits. We designed the QA machine on an…
We present a novel self-correcting, high-speed optoelectronic probabilistic computer architecture that leverages source-device independent (SDI) quantum photonic p-bits integrated with robust electronic control. Our approach combines the…
We study learned memory tokens as a computational scratchpad for a single-block Universal Transformer with Adaptive Computation Time (ACT) on Sudoku-Extreme, a combinatorial reasoning benchmark. Memory tokens are empirically necessary: no…
Nanoscale integrated photonic devices and circuits offer a path to ultra-low power computation at the few-photon level. Here we propose an optical circuit that performs a ubiquitous operation: the controlled, random-access readout of a…
A programmable trigger logic module (TRILOMO) was implemented successfully in an FPGA using their internal look-up tables to save Boolean functions. Up to 16 trigger input signals can be combined logically for a fast trigger decision. The…
Scalable quantum information processing with integrated photonics requires quantum logic operations with high fidelity and robustness. Directional couplers, the fundamental elements enabling quantum interference and logic operations, are…
Emerging non-volatile memories have been proposed for a wide range of applications from easing the von-Neumann bottleneck to neuromorphic applications. Specifically, scalable RRAMs based on Pr$_{1-x}$Ca$_x$MnO$_3$ (PCMO) exhibit analog…
To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and can be cascaded within the SW domain without requiring back…
The success of the transistor as the cornerstone of digital computation motivates analogous efforts to identify an equivalent hardware primitive, the probabilistic bit or p-bit, for the emerging paradigm of probabilistic computing. Here, we…
Physical random number generators based on chaotic microcombs, with their complex nonlinear dynamics and multi-channel parallel capability, have attracted considerable research attention. However, key technical challenges for chaotic…