Related papers: A high-resolution programmable Vernier delay gener…

This paper presents a self-contained factorization for the delay Vandermonde matrix (DVM), which is the super class of the discrete Fourier transform, using sparse and companion matrices. An efficient DVM algorithm is proposed to reduce the…

In this paper, we first propose a method that can efficiently compute the maximal robust controlled invariant set for discrete-time linear systems with pure delay in input. The key to this method is to construct an auxiliary linear system…

The Delay Line Distribution System (DLDS) is an alternative to conventional pulse compression, which enhances the peak power of rf sources while matching the long pulse of those sources to the shorter filling time of accelerator structures.…

In this paper, we present a multiplier based on a sequence of approximated accumulations. According to a given splitting point of the carry chains, the technique herein introduced allows varying the quality of the accumulations and,…

This paper presents a configurable Convolutional Neural Network Accelerator (CNNA) for a System on Chip design (SoC). The goal was to accelerate inference of different deep learning networks on an embedded SoC platform. The presented CNNA…

The dispersed fixed-delay Intereferometer (DFDI) method is attractive for its low cost, compact size, and multiobject capability in precision radial-velocity (RV) measurements. The phase shift of fringes of stellar absorption lines is…

This paper presents a single-step tunable group delay phaser for spectrum sniffing. This device may be seen as a "time filter", where frequencies are suppressed by time separation rather than by spectral attenuation. Compared to its…

A fully digital beam position and phase measurement (BPPM) system was designed for the linear accelerator (LINAC) in Accelerator Driven Sub-critical System (ADS) in China. Phase information is obtained from the summed signals from four…

The presented paper introduces a design for a phase-locked loop (PLL) that is utilized in frequency synthesis and modulation-demodulation within communication systems and in VLSI applications. The CMOS PLL is designed using 180 nm…

Nonlinear photonic delay systems present interesting implementation platforms for machine learning models. They can be extremely fast, offer great degrees of parallelism and potentially consume far less power than digital processors. So far…

We present a method for the evaluation, at the first level of trigger, of logical conditions with high time resolution, using the digitized times of fast signals delivered in the detectors of high rate experiments. We describe a…

This paper presents a high-order differentiator for delayed measurement signal. The proposed differentiator not only can correct the delay in signal, but aslo can estimate the undelayed derivatives. The differentiator consists of two-step…

This study proposes an algorithm to synthesize controllers for the power management on board hybrid vehicles that allows the vehicle to reach its maximum range along a given route. The algorithm stems from a level-set approach that computes…

Flexibility and customization are key strengths of Field-Programmable Gate Arrays (FPGAs) when compared to other computing devices. For instance, FPGAs can efficiently implement arbitrary-precision arithmetic operations, and can perform…

We present a new method for time delay estimation using band limited frequency domain data representing the port responses of interconnect structures. The approach is based on the recently developed by the authors spectrally accurate method…

Packet parsing is a key step in SDN-aware devices. Packet parsers in SDN networks need to be both reconfigurable and fast, to support the evolving network protocols and the increasing multi-gigabit data rates. The combination of packet…

In this paper, we consider the HLS implementation of a three-dimensional systolic array architecture for matrix multiplication that targets specific characteristics of Intel Stratix 10 FPGAs in order to produce designs that achieve a high…

LiDAR sensors have been widely used in many autonomous vehicle modalities, such as perception, mapping, and localization. This paper presents an FPGA-based deep learning platform for real-time point cloud processing targeted on autonomous…

In view of the large amount of calculation and long calculation time of convolutional neural network (CNN), this paper proposes a convolutional neural network hardware accelerator based on field programmable logic gate array (FPGA). First,…

Binary neural networks provide a promising solution for low-power, high-speed inference by replacing expensive floating-point operations with bitwise logic. This makes them well-suited for deployment on resource-constrained platforms such…