Related papers: An Accurate Interconnect Test Structure for Parasi…
This paper presents a hierarchical control scheme for interconnected linear systems. At the higher layer of the control structure a robust centralized Model Predictive Control (MPC) algorithm based on a reduced order dynamic model of the…
By advances in technology, integrated circuits have come to include more functionality and more complexity in a single chip. Although methods of testing have improved, but the increase in complexity of circuits, keeps testing a challenging…
Microring resonators enable the enhancement of nonlinear frequency mixing processes, generating output fields at frequencies that widely differ from the inputs, in some cases by more than an octave. The efficiency of such devices depends on…
Resistive-capacitive (RC) networks are used to model various processes in engineering, physics or biology. We consider the problem of recovering the network connection structure from measured input-output data. We address this problem as a…
In RF-MEMS packaging, next to the protection of movable structures, optimization of package electrical performance plays a very important role. In this work, a wafer-level packaging process has been investigated and optimized in order to…
We consider exact asymptotics of the minimax risk for global testing against sparse alternatives in the context of high dimensional linear regression. Our results characterize the leading order behavior of this minimax risk in several…
Reconstruction of how components communicate with each other during system execution is crucial for debugging system-on-chip designs. However, limited observability is the major obstacle to the efficient and accurate reconstruction in the…
The study and modelling of planar capacitors remain highly relevant due to their broad applications. However, their accurate modelling presents significant challenges due to intrinsic high-frequency effects, which include not only parasitic…
This paper proposes an simple but yet effective approach to structured parametric controller design in a linear fractional form. The main contribution consists in using structured $\mathcal{H}_\infty$ oriented optimization tools in an…
Superconducting circuits are a leading platform for scalable quantum computing, where parametric modulation is a widely used technique for implementing high-fidelity multi-qubit operations. A critical challenge, however, is that this…
This paper constitutes a short introduction to parametric verification of concurrent systems. It originates from two 1-day tutorial sessions held at the Petri nets conferences in Toru\'n (2016) and Zaragoza (2017). The paper presents not…
This paper presents a pipeline stage resolved timing characterization of a 32-bit RISC V processor implemented on a 20 nm FPGA and a 7 nm FinFET ASIC platform. A unified analysis framework is introduced that decomposes timing paths into…
The routing algorithms for parallel computers, on-chip networks, multi-core processors, and multiprocessors system-on-chip (MP-SoCs) exhibit router failures must be able to handle interconnect router failures that render a symmetrical mesh…
A parasitic reconfigurable antenna array is a low-power approach for beamforming using passive tunable elements. Prior work on reconfigurable antennas in communication theory is based on ideal radiation pattern abstractions. It does not…
Interconnected embedded devices are increasingly used invarious scenarios, including industrial control, building automation, or emergency communication. As these systems commonly process sensitive information or perform safety critical…
As Large Language Models (LLMs) become increasingly integrated into many technological ecosystems across various domains and industries, identifying which model is deployed or being interacted with is critical for the security and…
Testing of synchronous reactive systems is challenging because long input sequences are often needed to drive them into a state at which a desired feature can be tested. This is particularly problematic in on-target testing, where a system…
The increasing computational demand of Convolutional Neural Networks (CNNs) necessitates energy-efficient acceleration strategies. Compute-in-Memory (CIM) architectures based on Resistive Random Access Memory (RRAM) offer a promising…
Predictable circuit response is a critical prerequisite for accurate electronic measurements. We describe a powerful, yet straightforward, experimental method and analysis model that utilizes an affordable LCR meter in conjunction with an…
Many long short-term memory (LSTM) applications need fast yet compact models. Neural network compression approaches, such as the grow-and-prune paradigm, have proved to be promising for cutting down network complexity by skipping…