Related papers: Optimization on fixed low latency implementation o…

ALICE is the CERN LHC experiment optimised for the study of the strongly interacting matter produced in heavy-ion collisions and devoted to the characterisation of the quark-gluon plasma. To achieve the physics program for LHC Run 3, a…

Production of the High Granularity Timing Detector for the ATLAS experiment at High Luminosity LHC requires over 21000 silicon sensors based on Low Gain Avalanche Diode (LGAD) technology. Their radiation hardness is monitored as a part of…

We present the procedures and results of the quality control tests for the front-end optical link components in the ATLAS Liquid Argon Calorimeter Phase-1 upgrade. The components include a Vertical-Cavity Surface-Emitting Laser (VCSEL)…

Mini-batch inference of Graph Neural Networks (GNNs) is a key problem in many real-world applications. Recently, a GNN design principle of model depth-receptive field decoupling has been proposed to address the well-known issue of…

ALICE (A Large Ion Collider Experiment) is the CERN LHC experiment optimized for the study of the strongly interacting matter produced in heavy-ion collisions and devoted to the characterization of the Quark-Gluon Plasma. To achieve the…

The LHCb experiment(Fig. 1), that is presently taking data at CERN (European Center for Nuclear Research) Large Hadron Collider (LHC), aims at the study of CP violation in the B meson sector. Its key elements is the Muon detector [1], which…

LLM decoding is bottlenecked for large batches and long contexts by loading the key-value (KV) cache from high-bandwidth memory, which inflates per-token latency, while the sequential nature of decoding limits parallelism. We analyze the…

The LHC upgrade is planned to enhance the instantaneous luminosity during Run 3 from 2021 through 2023. The Phase-I upgrade of the trigger readout electronics for the ATLAS Liquid Argon (LAr) Calorimeters will be installed during the second…

Generation and exploration of approximate circuits and accelerators has been a prominent research domain to achieve energy-efficiency and/or performance improvements. This research has predominantly focused on ASICs, while not achieving…

The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at…

We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…

Field-Programmable Gate Arrays (FPGAs) are widely used in the central signal processing design of the Square Kilometre Array (SKA) as acceleration hardware. The frequency domain acceleration search (FDAS) module is an important part of the…

This paper presents the design and characterisation of a front-end prototype ASIC for the ATLAS High Granularity Timing Detector, which is planned for the High-Luminosity phase of the LHC. This prototype, called ALTIROC1, consists of a…

The current over-provisioned heterogeneous multi-cores require effective run-time optimization strategies, and the run-time power monitoring subsystem is paramount for their success. Several state-of-the-art methodologies address the design…

The ATLAS experiment relies on real-time hadronic jet reconstruction and $b$-tagging to record fully hadronic events containing $b$-jets. These algorithms require track reconstruction, which is computationally expensive and could overwhelm…

Over the past years, TCP has gone through numerous updates to provide performance enhancement under diverse network conditions. However, with respect to losses, little can be achieved with legacy TCP detection and recovery mechanisms. Both…

Accurate and low-latency qubit state measurement is critical for trapped-ion quantum computing. While deep neural networks (DNNs) have been integrated to enhance detection fidelity, their latency performance on specific hardware platforms…

FPGA overlays are commonly implemented as coarse-grained reconfigurable architectures with a goal to improve designers' productivity through balancing flexibility and ease of configuration of the underlying fabric. To truly facilitate full…

The ATLAS experiment will undergo around the year 2025 a replacement of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) with a new 5-layer pixel system. Thin planar pixel sensors are promising candidates to…

Field-programmable gate arrays (FPGAs) are becoming widely used accelerators for a myriad of datacenter applications due to their flexibility and energy efficiency. Among these applications, FPGAs have shown promising results in…