Related papers: Early Output Hybrid Input Encoded Asynchronous Ful…

This paper is concerned with the design of capacity approaching ensembles of Low-Densiy Parity-Check (LDPC) codes for correlated sources. We consider correlated binary sources where the data is encoded independently at each source through a…

The intent of the H.264 AVC project was to create a standard capable of providing good video quality at substantially lower bit rates than previous standards without increasing the complexity of design so much that it would be impractical…

In this work, we propose a coding strategy designed to enhance the throughput of hybrid ARQ (HARQ) transmissions over i.i.d. block-fading channels with the channel state information (CSI) unknown at the transmitter. We use a joint packet…

Although Long Reasoning Models (LRMs) have achieved superior performance on various reasoning scenarios, they often suffer from increased computational costs and inference latency caused by overthinking. To address these limitations, we…

In the context of integrated sensing and communication (ISAC), a full-duplex (FD) transceiver can operate as a monostatic radar while maintaining communication capabilities. This paper investigates the design of precoders and combiners for…

Revisionist integral deferred correction (RIDC) methods are a family of parallel--in--time methods to solve systems of initial values problems. The approach is able to bootstrap lower order time integrators to provide high order…

In this paper, we investigate the problem of asynchronous coded caching in fog radio access networks (F-RANs). To minimize the fronthaul load, the encoding set collapsing rule and encoding set partition method are proposed to establish the…

To foster the adoption of active disturbance rejection control (ADRC) and support its deployment even on low-cost embedded systems, this article introduces the most efficient implementation of linear discrete-time ADRC to date. While…

This paper proposes a Low-Power, Energy Efficient 4-bit Binary Coded Decimal (BCD) adder design where the conventional 4-bit BCD adder has been modified with the Clock Gated Power Gating Technique. Moreover, the concept of DVT (Dual-vth)…

End-to-end (E2E) automatic speech recognition (ASR) models, by now, have shown competitive performance on several benchmarks. These models are structured to either operate in streaming or non-streaming mode. This work presents cascaded…

In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not…

In this paper, we propose a Rectified Flow Auto Coder (RAC) inspired by Rectified Flow to replace the traditional VAE: 1. It achieves multi-step decoding by applying the decoder to flow timesteps. Its decoding path is straight and…

In this paper, we further develop a family of parallel time integrators known as Revisionist Integral Deferred Correction methods (RIDC) to allow for the semi-implicit solution of time dependent PDEs. Additionally, we show that our…

Cloud RAN (C-RAN) is a promising enabler for distributed massive MIMO systems, yet is vulnerable to its fronthaul congestion. To cope with the limited fronthaul capacity, this paper proposes a hybrid analog-digital precoding design that…

In this work, we present a novel inner product design for stochastic computing. Stochastic computing is an emerging computing technique, that encodes a number in the probability of observing a one in a random bit stream. This leads to…

This paper studies zero-delay joint source channel coding (JSCC) for transmission of correlated Gaussian sources over a Gaussian interference channel (GIC). We propose to adopt delay-free hybrid digital and analog (HDA) scheme, which is,…

We propose composite decode-forward (DF) schemes for the two-way relay channel in both the full- and half-duplex modes by combining coherent relaying, independent relaying and partial relaying strategies. For the full-duplex mode, the relay…

We investigate fully asynchronous unsourced random access (URA), and propose a high-performing scheme that employs on-off division multiple access (ODMA). In this scheme, active users distribute their data over the transmit block based on a…

We propose an easy-to-implement hard-decision majority-logic decoding algorithm for Reed-Muller codes RM(r,m) with m >= 3, m/2 >= r >= 1. The presented algorithm outperforms the best known majority-logic decoding algorithms and offers…

Constrained Concept Factorization (CCF) yields the enhanced representation ability over CF by incorporating label information as additional constraints, but it cannot classify and group unlabeled data appropriately. Minimizing the…