Related papers: A Prototype Scalable Readout System for Micro-patt…

The next generation of Adaptive Optics (AO) systems on large telescopes will require immense computation performance and memory bandwidth, both of which are challenging with the technology available today. The objective of this work is to…

This paper presents the design and simulation results of a gigabit transceiver Application Specific Integrated Circuit (ASIC) called GBCR for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR has four upstream receiver…

The Front End Driver, FED, is a 9U 400mm VME64x card designed for reading out the Compact Muon Solenoid, CMS, silicon tracker signals transmitted by the APV25 analogue pipeline Application Specific Integrated Circuits. The FED receives the…

The ALICE experiment will upgrade the innermost three layers of its vertexing detector, the Inner Tracking System (ITS), during the next LHC Long Shutdown (LS3) with a novel, bent, ultra-light MAPS-based tracker. Six wafer-scale sensor…

Reconfigurable Intelligent Surfaces (RIS) have been recognized as a promising technology to enhance both communication and sensing performance in integrated sensing and communication (ISAC) systems for future 6G networks. However, existing…

This work is proposing and exploring the use of multichannel readout electronics, already used in quality assurance for gain uniformity studies, to measure the uniformity of the induction gap in GEM based detectors. The measurement will…

The Fermi Large Area Telescope (LAT) consists of 16 towers, each incorporating a tracker made up of a stack of 18 pairs of orthogonal silicon strip detectors (SSDs), interspersed with tungsten converter foils. The strip numbers of the…

This paper investigates a cell-free massive MIMO (multiple-input multiple-output) system where distributed access points (APs) perform integrated sensing and communications (ISAC) tasks, enabling simultaneous user communication and target…

We have assembled a small-scale streaming data acquisition system based on the SAMPA front-end ASIC. We report on measurements performed on the SAMPA chip and preliminary cosmic ray data acquired from a Gas Electron Multiplier (GEM)…

This paper introduces a reconfigurable intelligent surface (RIS) to support parameter estimation in machine-type communications (MTC). We focus on a network where single-antenna sensors transmit spatially correlated measurements to a…

This paper presents an investigation on the Radar Cross-Section (RCS) of various targets, with the objective of analysing how RCS properties vary with frequency. Targets such as an Automated Guided Vehicle (AGV), a pedestrian, and a…

Most existing antenna array-based source localization methods rely on fixed-position arrays (FPAs) and strict assumptions about source field conditions (near-field or far-field), which limits their effectiveness in complex, dynamic…

Single electron Sensitive Read Out (SiSeRO) is a novel on-chip charge detector output stage for charge-coupled device (CCD) image sensors. Developed at MIT Lincoln Laboratory, this technology uses a p-MOSFET transistor with a depleted…

Scientific detectors are a key technological enabler for many disciplines. Application-specific integrated circuits (ASICs) are used for many of these scientific detectors. Until recently, pixel detector ASICs have been used mainly for…

Reconfigurable Intelligent Surfaces enable active control of wireless propagation channels, which is crucial for future 5G and 6G networks. This work presents a scalable RIS design operating at 3.6 GHz with both 1 bit and 3 bit phase…

Forthcoming 6G networks have two predominant features of wide coverage and sufficient computation capability. To support the promising applications, Integrated Sensing, Communication, and Computation (ISCC) has been considered as a vital…

We have developed a flexible radio-frequency readout system suitable for a variety of superconducting detectors commonly used in millimeter and submillimeter astrophysics, including Kinetic Inductance detectors (KIDs), Thermal KID…

High energy physics detectors can be described hierarchically from the different subsystems to their divisions in r, phi, theta and to the individual readout channels. An identification schema that follows the logical decomposition of the…

We present a gigabit transceiver prototype Application Specific Integrated Circuit (ASIC), GBCR, for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR is designed in a 65-nm CMOS technology and consists of four upstream…

We report on the design, production, and testing of advanced double-sided silicon strip detectors under development at the Max-Planck-Institute as part of the Medium Energy Gamma-ray Astronomy (MEGA) project. The detectors are designed to…