Related papers: Testable Design of Repeaterless Low Swing On-Chip …
A clock synchronizing circuit for repeaterless low swing interconnects is presented in this paper. The circuit uses a delay locked loop (DLL) to generate multiple phases of the clock, of which the one closest to the center of the eye is…
The design and performance of a sensitive and reliable cross-correlation spectrum analyzer for studying low frequency transport noise is described in detail. The design makes use of common PC-based data acquisition hardware and…
The increasing complexity and the short life cycles of embedded systems are pushing the current system-on-chip designs towards a rapid increasing on the number of programmable processing units, while decreasing the gate count for custom…
Real-time hybrid testing is a method in which a substructure of the system is realised experimentally and the rest numerically. The two parts interact in real time to emulate the dynamics of the full system. Such experiments however are…
Applications of reversible circuits can be found in the fields of low-power computation, cryptography, communications, digital signal processing, and the emerging field of quantum computation. Furthermore, prototype circuits for low-power…
The increasing complexity of Internet-of-Things (IoT) applications and near-sensor processing algorithms is pushing the computational power of low-power, battery-operated end-node systems. This trend also reveals growing demands for…
For nanotechnology nodes, the feature size is shrunk rapidly, the wire becomes narrow and thin, it leads to high RC parasitic, especially for resistance. The overall system performance are dominated by interconnect rather than device. As…
Power dissipation in integrated circuits is one of the major concerns to the research community, at the verge when more number of transistors are integrated on a single chip. The substantial source of power dissipation in sequential…
This paper presents a novel repeater insertion algorithm for interconnect power minimization. The novelty of our approach is in the judicious integration of an analytical solver and a dynamic programming based method. Specifically, the…
This paper describes a flexible logic BIST scheme that features high fault coverage achieved by fault-simulation guided test point insertion, real at-speed test capability for multi-clock designs without clock frequency manipulation, and…
By advances in technology, integrated circuits have come to include more functionality and more complexity in a single chip. Although methods of testing have improved, but the increase in complexity of circuits, keeps testing a challenging…
Battery-free computational RFID platforms, such as WISP (Wireless Identification and Sensing Platform), are emerging intermittently powered devices designed for replacing existing battery-powered sensor networks. As their applications…
Signal gating combined with local-oscillator-frequency switching enables bandwidth scaling of offline coherent reception without costly receiver parallelization. We experimentally verify this concept at symbol rates of up to 288 GBaud.
We present a minimal-component bidirectional digital interconnect that enables simultaneous transmission and reception of baseband logic signals over a single coaxial cable. The circuit consists of a passive resistive hybrid providing…
Monolithic stitched CMOS sensors are explored for the upgrade of Inner Tracking System of the ALICE experiment (ITS3) and the R&D of the CERN Experimental Physics Department. To learn about stitching, two 26 cm long stitched sensors, the…
This work presents a producer-consumer link between two independent clock domains. The link allows for metastability-free, low-latency, high-throughput communication by slight adjustments to the clock frequencies of the producer and…
Ising machines are specialized computers for finding the lowest energy states of Ising spin models, onto which many practical combinatorial optimization problems can be mapped. Simulated bifurcation (SB) is a quantum-inspired parallelizable…
Coupled oscillator-based networks are an attractive approach for implementing hardware neural networks based on emerging nanotechnologies. However, the readout of the state of a coupled oscillator network is a difficult challenge in…
In this letter, we investigate the joint receiver design for integrated sensing and communication (ISAC) systems, where the communication signal and the target echo signal are simultaneously received and processed to achieve a balanced…
We present the first demonstration of a local oscillator (LO)-less digital signal processing (DSP)-free coherent receiver for high-capacity short distance optical links. Experimental results with an analog domain constant modulous algorithm…