Related papers: A Clock Synchronizer for Repeaterless Low Swing On…

As the demand for high-performance microprocessors increases, the circuit complexity and the rate of data transfer increases resulting in higher power consumption. We propose a clocking architecture that uses a series LC resonance and…

The design of a high-precision time-to-digital converter (TDC) based on a multiphase clock implemented using a single field-programmable gate array is discussed in this paper. The TDC can increase the resolution of the measurement by using…

This work presents a producer-consumer link between two independent clock domains. The link allows for metastability-free, low-latency, high-throughput communication by slight adjustments to the clock frequencies of the producer and…

A simple data-aided scheme for sampling clock synchronisation in reduced-guard-interval coherent optical orthogonal frequency division multiplexing (RGI-CO-OFDM) systems is proposed. In the proposed scheme, the sampling clock offset (SCO)…

We propose a method for optimizing mutual coupling functions to achieve fast and global synchronization between a pair of weakly coupled limit-cycle oscillators. Our method is based on phase reduction that provides a concise low-dimensional…

This paper presents a low power, low jitter LC phase locked loop (PLL) which has been designed and fabricated in a commercial 0.25-um Silicon-on-Sapphire CMOS technology. Random jitter and deterministic jitter of the PLL are 1.3 ps and 7.5…

Synchronised laser oscillators are essential for probing the fastest processes in chemistry, materials science, and biology down to atto-second timescales. Tight synchronisation is also crucial at scientific facilities such as free-electron…

In this paper, we demonstrate a simple scheme of 6.835 GHz microwave frequency synthesizer based on the sub-sampling phase lock loop (PLL) technique. The application of the sub-sampling PLL is the key to simplify the architecture of the…

The use of precision timing measurements will be a major tool at the HL-LHC, where it will be used to suppress pile-up and to search for long-lived particles. To control a reference clock with sub-picosecond accuracy, we have fabricated in…

This paper proposes and evaluates a novel architecture for a low-power Time-to-Digital Converter with high resolution, optimized for both integration in multichannel chips and high rate operation (40 Mconversion/s/channel). This converter…

In digital circuit designs, sequential components such as flip-flops are used to synchronize signal propagations. Logic computations are aligned at and thus isolated by flip-flop stages. Although this fully synchronous style can reduce…

A grid tied inverter converts DC voltage into AC voltage, while synchronizing it with the supply line phase and frequency. This paper presents an efficient, robust, and easy-to-implement grid tie mechanism. First, the grid tie mechanism was…

We experimentally study the synchronization of two chaotic electronic circuits whose dynamics is relayed by a third parameter-matched circuit, to which they are coupled bidirectionally in a linear chain configuration. In a wide range of…

Clock synchronization has become a key design objective in wireless networks for its essential importance in many applications. However, as the wireless link is prone to random network delays due to unreliable channel conditions, it is in…

We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and methods used to specify block constraints, to design and verify the…

Synchronizing clocks on Internet of Things (IoT) devices is important for applications such as monitoring and real time control. In this paper, we describe a system for clock synchronization in IoT devices that is designed to be scalable,…

A 33.6 ps LSB Time-to-Digital converter was designed in 130 nm BiCMOS technology. The core of the converter is a differential 9-stage ring oscillator, based on a multi-path architecture. A novel version of this design is proposed, along…

This paper presents a novel strategy for the synchronization of grid-following Voltage Source Converters (VSCs) in power systems with low rotational inertia. The proposed synchronization unit is based on emulating the physical properties of…

We propose a simple and new unified method to achieve lag, complete and anticipatory synchronizations in coupled nonlinear systems. It can be considered as an alternative to the subsystem and intentional parameter mismatch methods. This…

We investigate the synchronization of oscillators based on anharmonic nanoelectromechanical resonators. Our experimental implementation allows unprecedented observation and control of parameters governing the dynamics of synchronization. We…