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We consider a neural network (NN) that may experience memory faults and computational errors. In this paper, we propose a novel real-number-based error correction code (ECC) capable of detecting and correcting both memory errors and…

Typically, fault-tolerant operations and code concatenation are reserved for quantum error correction due to their resource overhead. Here, we show that fault tolerant operations have a large impact on the performance of symmetry based…

Combining spin-orbit (SOT) and spin-transfer torques (STT) provides a practical approach for field-free switching in spin-orbit torque magnetic random-access memory (SOT-MRAM), a prerequisite for industrial deployment, but can compromise…

In recent years, the energy consumption of computing systems has increased and a large fraction of this energy is consumed in main memory. Towards this, researchers have proposed use of non-volatile memory, such as phase change memory…

Hardware neural networks that implement synaptic weights with embedded non-volatile memory, such as spin torque memory (ST-MRAM), are a major lead for low energy artificial intelligence. In this work, we propose an approximate storage…

Magneto-Electric FET (MEFET) is a recently developed post-CMOS FET, which offers intriguing characteristics for high speed and low-power design in both logic and memory applications. In this paper, for the first time, we propose a…

Measurement-free quantum error correction (MFQEC) offers an alternative to standard measurement-based QEC in platforms with an unconditional qubit reset gate. We revisit the question of fault tolerance (FT) for a measurement-free variant of…

This paper addresses poor cluster formation and frequent Cluster Head (CH) failure issues of underwater sensor networks by proposing an energy-efficient hierarchical topology-aware clustering routing (EEHTAC) protocol. In this paper,…

Spin-Orbit Torque (SOT) Magnetic Random-Access Memory (MRAM) devices offer improved power efficiency, nonvolatility, and performance compared to static RAM, making them ideal, for instance, for cache memory applications. Efficient…

Magnetic random-access memory (MRAM) is a promising memory technology due to its high density, non-volatility, and high endurance. However, achieving high memory fidelity incurs significant write-energy costs, which should be reduced for…

This article summarizes key results of our work on experimental characterization and analysis of latency variation and latency-reliability trade-offs in modern DRAM chips, which was published in SIGMETRICS 2016, and examines the work's…

Robustness to bit errors is a key requirement for the reliable use of neural networks (NNs) on emerging approximate computing platforms and error-prone memory technologies. A common approach to achieve bit error tolerance in NNs is…

This paper summarizes our work on characterizing application memory error vulnerability to optimize datacenter cost via Heterogeneous-Reliability Memory (HRM), which was published in DSN 2014, and examines the work's significance and future…

Write disturbance error (WDE) appears as a serious reliability problem preventing phase-change memory (PCM) from general commercialization, and therefore several studies have been proposed to mitigate WDEs. Verify-and-correction (VnC)…

The error correcting performance of multi-level-cell (MLC) NAND flash memory is closely related to the block length of error correcting codes (ECCs) and log-likelihood-ratios (LLRs) of the read-voltage thresholds. Driven by this issue, this…

Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has…

The storage industry is moving toward emerging non-volatile memories (NVMs), including the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) and the phase-change memory (PCM), owing to their high density and low-power…

Processing in memory (PiM) represents a promising computing paradigm to enhance performance of numerous data-intensive applications. Variants performing computing directly in emerging nonvolatile memories can deliver very high energy…

A common assumption in analyses of error thresholds and quantum computing in general is that one applies fault-tolerant quantum error correction (FTQEC) after every gate. This, however, is known not to always be optimal if the FTQEC…

The critical current density $J_{c0}$ required for switching the magnetization of the free layer (FL) in a spin-transfer torque magnetic random access memory (STT-MRAM) cell is proportional to the product of the damping parameter,…